Blaise Tine
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8a9a67aa5a
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minor update
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2021-02-27 21:54:55 -08:00 |
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Blaise Tine
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f5a17bd1a9
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decode optimization and refactoring
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2021-02-27 18:21:41 -08:00 |
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Blaise Tine
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34ce0b8e89
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minor update
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2021-02-23 20:54:03 -08:00 |
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Blaise Tine
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700f9eea19
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moving MUL unit into ALU unit
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2021-02-23 13:49:02 -08:00 |
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Blaise Tine
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1792571e1b
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minor update
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2021-02-22 13:30:45 -08:00 |
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Blaise Tine
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6d7692da37
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minor fix.
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2021-02-21 03:37:36 -08:00 |
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Blaise Tine
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9eed48435c
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instruction decode optimization
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2021-02-14 00:19:54 -08:00 |
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Blaise Tine
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98945df5ae
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minor updates
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2021-01-17 12:50:07 -08:00 |
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Blaise Tine
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7c4823e65c
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fixed GPR reset bug, fixed lsu dup loading, fixed riscv-tests
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2021-01-11 23:55:09 -08:00 |
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Blaise Tine
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b459192dec
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critical path optimization - fpga fmax @4c = ~212 mhz
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2020-12-26 03:28:32 -08:00 |
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Blaise Tine
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13a5370254
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register file refactoring
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2020-12-05 01:40:50 -08:00 |
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Blaise Tine
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74c9e9ad1f
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minor update
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2020-12-01 10:42:14 -08:00 |
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Blaise Tine
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4c6a74fa87
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cache refactoring - phase 3 - added dedicated pipeline stage for tag access
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2020-11-04 03:21:30 -08:00 |
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Blaise Tine
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7529f72c5d
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fixed OPAE crash, added custom bram module to controll rw collision, dogfood testcase argurment, optimzed buffered fifo, quartus build optimization flags
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2020-10-20 05:32:55 -07:00 |
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Blaise Tine
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49b86c4b2a
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SCOPE update
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2020-09-05 10:52:59 -07:00 |
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Blaise Tine
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ee81e81818
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adding using serial divider to save area cost
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2020-08-25 02:29:27 -07:00 |
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Blaise Tine
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df25bae456
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optimize warp_sched
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2020-08-24 05:36:00 -07:00 |
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Blaise Tine
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57971f6c76
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decode op_mod optimization
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2020-08-24 02:55:14 -07:00 |
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Blaise Tine
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0b355f228e
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ibuffer addition
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2020-08-22 00:22:04 -07:00 |
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Blaise Tine
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6c12391338
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pipeline refactoring - fmax >= 222 mhz
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2020-08-14 21:50:14 -07:00 |
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Blaise Tine
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65415d2bbc
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getting dogfood tests passing on Verilator!
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2020-08-09 18:13:12 -04:00 |
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Blaise Tine
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b8cd3b0b28
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gpr pipeline optimization
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2020-08-01 12:38:30 -04:00 |
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Blaise Tine
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c9755a0c48
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lkg build with pipeline + FPU fixes
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2020-07-31 09:29:44 -04:00 |
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Blaise Tine
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27e95530ef
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pipeline optimization
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2020-07-30 03:06:01 -07:00 |
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Blaise Tine
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c2dd0a8b39
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modelsim fixes && pipeline optimization
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2020-07-28 14:20:23 -07:00 |
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Blaise Tine
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ff12393998
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floating point support fixes
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2020-07-27 04:53:13 -04:00 |
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Blaise Tine
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7c86b68977
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pipeline refactoring: centralized issue buffer
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2020-07-26 11:21:08 -04:00 |
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Blaise Tine
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1f63f9da25
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new fpu implementation
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2020-07-24 00:00:37 -04:00 |
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Blaise Tine
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75e3c31b56
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fpu implementation (part1)
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2020-07-23 03:18:09 -07:00 |
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Blaise Tine
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dc7efbcfb4
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pipeline refactoring
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2020-07-21 05:22:47 -04:00 |
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Blaise Tine
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e2100e9e87
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pipeline refactoring
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2020-07-20 09:38:54 -04:00 |
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Blaise Tine
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25f66e6490
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pipeline refactoring
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2020-07-19 05:03:47 -04:00 |
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Blaise Tine
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77c3b2d45f
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lsu_unit refactoring to reduce critical path
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2020-07-10 11:23:34 -07:00 |
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Blaise Tine
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bca36e213e
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interfaces refactoring
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2020-07-02 20:43:52 -07:00 |
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Blaise Tine
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c5a64a0eed
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interfaces refactoring
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2020-07-02 19:31:55 -07:00 |
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Blaise Tine
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5d088d67c8
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Gather FPGA perf stats
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2020-07-01 09:30:12 -07:00 |
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Blaise Tine
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e6cc221a44
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refactoring
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2020-06-23 10:59:30 -07:00 |
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Blaise Tine
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d6b0ef2b3c
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scope refactoring + snoop invalidate
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2020-06-12 00:04:31 -07:00 |
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Blaise Tine
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611ceb000a
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fixed warp_sched lock bug
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2020-05-28 08:52:20 -04:00 |
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Blaise Tine
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9e5885b820
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adding dram writeenable support + scheduler bug fixes
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2020-05-27 19:00:23 -04:00 |
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Blaise Tine
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e269909db9
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opae rtl fixes
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2020-05-19 13:47:47 -07:00 |
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Blaise Tine
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2ab90e9436
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rtl refactoring
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2020-05-05 13:31:50 -04:00 |
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Blaise Tine
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b7e892ee16
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rtl refactoring
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2020-05-05 10:46:48 -04:00 |
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Blaise Tine
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f142afac80
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rtl refactoring
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2020-05-04 20:12:05 -04:00 |
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Blaise Tine
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a1dc90b951
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rtl cache refactory
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2020-04-30 17:12:18 -04:00 |
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Blaise Tine
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d85c0af5d6
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remove tab spaces
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2020-04-21 03:19:47 -04:00 |
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Blaise Tine
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d79e36912f
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fix opae build
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2020-04-20 12:51:42 -07:00 |
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Blaise Tine
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b76f8696bd
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removing *.vh file for opae build
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2020-04-20 15:07:27 -04:00 |
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Blaise Tine
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07135263f5
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RTL code refactoring
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2020-04-20 06:47:24 -04:00 |
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Blaise Tine
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e9dfa828fe
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RTL code refactoring
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2020-04-19 09:24:04 -04:00 |
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