 Blaise Tine
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f7887d8720
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refactoring device memory allocation and cleanup
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2022-01-28 21:57:16 -05:00 |
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Blaise Tine
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5825b7c15a
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dram simulator fix
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2021-12-07 22:44:06 -05:00 |
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Blaise Tine
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b741807f8c
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using ramulator dram simulator
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2021-12-06 01:22:45 -05:00 |
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Blaise Tine
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18762dffce
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fixes: texture unit mem access sometimes going to smem, bilinear texture filtering; new: cache req_id,
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2021-11-24 00:00:17 -05:00 |
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Blaise Tine
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27a65fdee7
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driver refactoring
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2021-11-14 09:05:15 -05:00 |
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Blaise Tine
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9656779d48
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minor update
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2021-11-14 04:45:06 -05:00 |
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Blaise Tine
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b529f538b8
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Makefile updates
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2021-10-17 10:52:07 -07:00 |
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Blaise Tine
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549629440d
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minor update
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2021-10-11 17:11:36 -04:00 |
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Blaise Tine
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28e26f3130
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minor update
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2021-10-09 13:19:46 -07:00 |
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Blaise Tine
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54bddeee9c
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simulation framework refactoring
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2021-10-09 10:20:42 -04:00 |
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Blaise Tine
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9f34b2944c
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code refactoring for Vivado, sv2v, and yosys compatibility
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2021-09-27 08:55:10 -04:00 |
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Blaise Tine
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18172fa611
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AXI memory bus support
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2021-09-10 01:36:01 -07:00 |
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Blaise Tine
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a60bfc5e01
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extending tracing feature for advanced debugging
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2021-08-15 05:10:46 -07:00 |
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Blaise Tine
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640c98a4e8
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Reverting Verilator versionb support to v4.200
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2021-08-14 00:45:56 -07:00 |
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Blaise Tine
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36d95fd892
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automatic perf dump fix
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2021-08-13 19:23:13 -07:00 |
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Blaise Tine
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3c43308e71
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Makfile fixes for latest version of Verilator
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2021-08-13 04:35:40 -07:00 |
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Blaise Tine
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4976a8c4f2
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enabling automatic device cleanup for bad applications not releasing the device on exit
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2021-08-12 20:06:51 -07:00 |
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Blaise Tine
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c331da5ff7
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adding fast DPI implemntation of imul and idiv
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2021-06-22 09:02:41 -07:00 |
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Blaise Tine
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3cc1190cd7
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CSRs I/O refactoring
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2021-06-11 03:08:07 -07:00 |
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Blaise Tine
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b3e54e66f8
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fixed compiler warnings
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2021-05-23 10:54:06 -07:00 |
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Blaise Tine
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95f057bc2e
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fpga build refactoring
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2021-04-29 06:17:28 -07:00 |
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Blaise Tine
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8410c49f53
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code refactoring: DRAM => MEM renaming
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2021-04-26 00:58:48 -07:00 |
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Blaise Tine
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0615e7481a
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minor update
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2021-04-24 03:06:24 -04:00 |
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Blaise Tine
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4cb98a25a7
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enabling 128-bit dram bus
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2021-04-24 00:31:27 -04:00 |
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Blaise Tine
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66ea340d05
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Fix RAM memory deallocation
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2021-03-09 01:52:56 -08:00 |
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Blaise Tine
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907e6868cd
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simx refactoring, fixed simple.hex, compatibility with rtlsim and vlsim complete, added to regression suite
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2021-03-08 23:58:33 -08:00 |
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Blaise Tine
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062d02ddce
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2021-03-04 20:51:03 -08:00 |
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Blaise Tine
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a8452483fe
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simX refactoring
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2021-02-27 02:27:19 -08:00 |
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Blaise Tine
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6c1dc96626
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simX refactoring + removed oldRTL + CSR updates
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2021-02-06 12:52:54 -08:00 |
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Blaise Tine
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5419859281
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fcvt fix
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2021-01-25 02:22:00 -08:00 |
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Blaise Tine
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5c83c594c1
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minor update
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2021-01-07 17:25:59 -08:00 |
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Blaise Tine
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146c285aa0
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minor update
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2021-01-06 19:59:04 -08:00 |
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Blaise Tine
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2b8435471a
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speeding up simulation using dedicated full dpi-based FPU core
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2021-01-06 18:44:06 -08:00 |
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Blaise Tine
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e4a00dd0d9
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fixed loader script stack setup
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2020-12-31 22:37:20 -05:00 |
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Blaise Tine
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703a861fe9
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added support for write-through cache, removed cache snooping support
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2020-12-23 23:51:02 -08:00 |
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Blaise Tine
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d5438fd591
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merging perf counters
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2020-12-08 21:02:39 -08:00 |
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Xandy Liu
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1595ff08e2
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PERF pipeline stalls and cache
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2020-12-08 01:14:41 -05:00 |
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Blaise Tine
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b85391389b
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rename MSRQ to MSHR
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2020-11-28 17:32:00 -05:00 |
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Blaise Tine
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00d7473268
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build warnings clean
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2020-11-28 14:59:13 -05:00 |
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Blaise Tine
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461be0880d
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fixed FPU-CSR data dependence
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2020-11-25 09:05:38 -08:00 |
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Blaise Tine
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c04d385641
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minor update
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2020-11-23 20:12:04 -08:00 |
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Blaise Tine
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20f22c7446
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scope minor fix
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2020-11-22 11:51:46 -08:00 |
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Blaise Tine
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1795980a52
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L2 and L1 using different block size support, RTLsim fixes, dram_rsp_ready optimization
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2020-11-21 09:47:56 -08:00 |
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Blaise Tine
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34b650be94
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fixed shared memory addressing critical path, fixed VX_fp_noncomp output bug
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2020-11-17 00:27:24 -08:00 |
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Blaise Tine
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61add25d96
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minor fix
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2020-11-16 08:23:16 -08:00 |
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Blaise Tine
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77bca2deca
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constant integration updates
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2020-11-16 02:39:53 -08:00 |
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Blaise Tine
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e946d976e7
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constant integration updates
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2020-11-15 08:44:57 -08:00 |
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Blaise Tine
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5d58bf3d11
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fixed l3cache hang using memory arbiter in afu
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2020-11-15 06:36:32 -08:00 |
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Blaise Tine
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ce95c40aee
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fixed redundant cache fills
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2020-11-11 12:07:27 -05:00 |
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Blaise Tine
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5be1d85648
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cache refactoring (fixed redundant fill requests, merged fill and writeback queues), optimized priority encoder, fixed crs cycles count
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2020-11-02 01:50:12 -08:00 |
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