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scope minor fix

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This commit is contained in:
Blaise Tine
2020-11-22 11:51:46 -08:00
parent 39f6f2999b
commit 20f22c7446
13 changed files with 45 additions and 27 deletions
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2
.travis.yml
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@@ -27,7 +27,7 @@ script:
- travis_wait 45 ci/test_opencl.sh
- travis_wait 45 ci/blackbox.sh --driver=rtlsim
- travis_wait 45 ci/blackbox.sh --driver=vlsim
- travis_wait 45 ci/blackbox.sh --driver=vlsim --scope
- travis_wait 45 ci/blackbox.sh --driver=vlsim --cores=1 --scope --app=demo --args="-n1"
- travis_wait 45 ci/blackbox.sh --driver=vlsim --debug
- travis_wait 45 ci/blackbox.sh --driver=vlsim --cores=1
- travis_wait 45 ci/blackbox.sh --driver=vlsim --cores=2

24
ci/blackbox.sh
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@@ -6,7 +6,7 @@ set -e
show_usage()
{
echo "Vortex BlackBox Test Driver v1.0"
echo "Usage: [[--clusters=#n] [--cores=#n] [--warps=#n] [--threads=#n] [--l2cache] [[--driver=rtlsim|vlsim] [--debug] [--scope] [--app=vecadd|sgemm|basic|demo|dogfood][--help]]"
echo "Usage: [[--clusters=#n] [--cores=#n] [--warps=#n] [--threads=#n] [--l2cache] [[--driver=rtlsim|vlsim] [--debug] [--scope] [--app=vecadd|sgemm|basic|demo|dogfood] [--args=<args>] [--help]]"
}
DRIVER=vlsim
@@ -18,6 +18,7 @@ THREADS=4
L2=0
DEBUG=0
SCOPE=0
HAS_ARGS=0
for i in "$@"
do
@@ -58,6 +59,11 @@ case $i in
SCOPE=1
shift
;;
--args=*)
ARGS=${i#*=}
HAS_ARGS=1
shift
;;
--help)
show_usage
exit
@@ -120,7 +126,13 @@ then
else
DEBUG=1 CONFIGS="$CONFIGS" make -C $DRIVER_PATH $DRIVER_EXTRA > build.log 2>&1
fi
make -C $APP_PATH run-$DRIVER > run.log 2>&1
if [ $HAS_ARGS -eq 1 ]
then
OPTS=$ARGS make -C $APP_PATH run-$DRIVER > run.log 2>&1
else
make -C $APP_PATH run-$DRIVER > run.log 2>&1
fi
else
if [ $SCOPE -eq 1 ]
then
@@ -128,5 +140,11 @@ else
else
CONFIGS="$CONFIGS" make -C $DRIVER_PATH $DRIVER_EXTRA > build.log 2>&1
fi
make -C $APP_PATH run-$DRIVER
if [ $HAS_ARGS -eq 1 ]
then
OPTS=$ARGS make -C $APP_PATH run-$DRIVER
else
make -C $APP_PATH run-$DRIVER
fi
fi

2
driver/opae/vlsim/Makefile
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@@ -60,7 +60,7 @@ VL_FLAGS += verilator.vlt
# Debugigng
ifdef DEBUG
VL_FLAGS += -DVCD_OUTPUT --assert --trace --trace-structs $(DBG_FLAGS)
VL_FLAGS += -DVCD_OUTPUT --trace --trace-structs $(DBG_FLAGS)
CFLAGS += -DVCD_OUTPUT $(DBG_FLAGS)
else
VL_FLAGS += -DNDEBUG

4
driver/rtlsim/Makefile
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@@ -46,7 +46,7 @@ SRCS += $(RTL_DIR)/fp_cores/svdpi/float_dpi.cpp
FPU_INCLUDE = -I$(RTL_DIR)/fp_cores -I$(RTL_DIR)/fp_cores/svdpi -I$(RTL_DIR)/fp_cores/fpnew/src/common_cells/include -I$(RTL_DIR)/fp_cores/fpnew/src/common_cells/src -I$(RTL_DIR)/fp_cores/fpnew/src/fpu_div_sqrt_mvp/hdl -I$(RTL_DIR)/fp_cores/fpnew/src
RTL_INCLUDE = -I$(RTL_DIR) -I$(RTL_DIR)/libs -I$(RTL_DIR)/interfaces -I$(RTL_DIR)/cache $(FPU_INCLUDE)
VL_FLAGS += --language 1800-2009 --assert -Wall -Wpedantic $(CONFIGS)
VL_FLAGS += -O2 --language 1800-2009 --assert -Wall -Wpedantic $(CONFIGS)
VL_FLAGS += -Wno-DECLFILENAME
VL_FLAGS += --x-initial unique --x-assign unique
VL_FLAGS += verilator.vlt
@@ -57,7 +57,7 @@ VL_FLAGS += verilator.vlt
# Debugigng
ifdef DEBUG
VL_FLAGS += -DVCD_OUTPUT --assert --trace --trace-structs $(DBG_FLAGS)
VL_FLAGS += -DVCD_OUTPUT --trace --trace-structs $(DBG_FLAGS)
CFLAGS += -DVCD_OUTPUT $(DBG_FLAGS)
else
VL_FLAGS += -DNDEBUG

4
driver/tests/basic/Makefile
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@@ -15,8 +15,8 @@ VX_LDFLAGS += $(VORTEX_RT_PATH)/libvortexrt.a
VX_SRCS = kernel.c
CXXFLAGS += -std=c++11 -O2 -Wall -Wextra -pedantic -Wfatal-errors
#CXXFLAGS += -std=c++11 -O0 -g -Wall -Wextra -pedantic -Wfatal-errors
#CXXFLAGS += -std=c++11 -O2 -Wall -Wextra -pedantic -Wfatal-errors
CXXFLAGS += -std=c++11 -O0 -g -Wall -Wextra -pedantic -Wfatal-errors
CXXFLAGS += -I../../include

6
driver/tests/demo/Makefile
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@@ -15,8 +15,8 @@ VX_LDFLAGS += $(VORTEX_RT_PATH)/libvortexrt.a
VX_SRCS = kernel.c
CXXFLAGS += -std=c++11 -O2 -Wall -Wextra -pedantic -Wfatal-errors
#CXXFLAGS += -std=c++11 -O0 -g -Wall -Wextra -pedantic -Wfatal-errors
#CXXFLAGS += -std=c++11 -O2 -Wall -Wextra -pedantic -Wfatal-errors
CXXFLAGS += -std=c++11 -O0 -g -Wall -Wextra -pedantic -Wfatal-errors
CXXFLAGS += -I../../include
@@ -45,7 +45,7 @@ run-ase: $(PROJECT)
ASE_LOG=0 LD_LIBRARY_PATH=../../opae/ase:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
run-vlsim: $(PROJECT)
ASE_LOG=0 LD_LIBRARY_PATH=../../opae/vlsim:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
LD_LIBRARY_PATH=../../opae/vlsim:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)
run-rtlsim: $(PROJECT)
LD_LIBRARY_PATH=../../rtlsim:$(LD_LIBRARY_PATH) ./$(PROJECT) $(OPTS)

4
driver/tests/dogfood/Makefile
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@@ -16,8 +16,8 @@ VX_LDFLAGS += -lm
VX_SRCS = kernel.c
CXXFLAGS += -std=c++11 -O2 -Wall -Wextra -pedantic -Wfatal-errors
#CXXFLAGS += -std=c++11 -O0 -g -Wall -Wextra -pedantic -Wfatal-errors
#CXXFLAGS += -std=c++11 -O2 -Wall -Wextra -pedantic -Wfatal-errors
CXXFLAGS += -std=c++11 -O0 -g -Wall -Wextra -pedantic -Wfatal-errors
CXXFLAGS += -I../../include -I../../../hw

4
hw/opae/VX_avs_wrapper.v
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@@ -116,9 +116,9 @@ module VX_avs_wrapper #(
always @(posedge clk) begin
if (dram_req_valid && dram_req_ready) begin
if (dram_req_rw)
$display("%t: AVS Wr Req: addr=%0h, byteen=%0h, tag=%0h, data=%0h", $time, `DRAM_TO_BYTE_ADDR(dram_req_addr), dram_req_byteen, dram_req_tag, dram_req_data);
$display("%t: AVS Wr Req: addr=%0h, byteen=%0h, tag=%0h, data=%0h", $time, `TO_FULL_ADDR(dram_req_addr), dram_req_byteen, dram_req_tag, dram_req_data);
else
$display("%t: AVS Rd Req: addr=%0h, byteen=%0h, tag=%0h, pending=%0d", $time, `DRAM_TO_BYTE_ADDR(dram_req_addr), dram_req_byteen, dram_req_tag, avs_pending_reads_n);
$display("%t: AVS Rd Req: addr=%0h, byteen=%0h, tag=%0h, pending=%0d", $time, `TO_FULL_ADDR(dram_req_addr), dram_req_byteen, dram_req_tag, avs_pending_reads_n);
end
if (dram_rsp_valid && dram_rsp_ready) begin
$display("%t: AVS Rd Rsp: tag=%0h, data=%0h, pending=%0d", $time, dram_rsp_tag, dram_rsp_data, avs_pending_reads_n);

2
hw/opae/vortex_afu.sv
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@@ -912,7 +912,7 @@ always @(posedge clk) begin
vx_snp_req_addr <= vx_snp_req_addr + `VX_DRAM_ADDR_WIDTH'(1);
snp_req_ctr <= snp_req_ctr_next;
`ifdef DBG_PRINT_OPAE
$display("%t: AFU Snp Req: addr=%0h, tag=%0h, rem=%0d", $time, `DRAM_TO_BYTE_ADDR(vx_snp_req_addr), (`VX_SNP_TAG_WIDTH)'(vx_snp_req_tag), (snp_req_size - snp_req_ctr_next));
$display("%t: AFU Snp Req: addr=%0h, tag=%0h, rem=%0d", $time, `TO_FULL_ADDR(vx_snp_req_addr), (`VX_SNP_TAG_WIDTH)'(vx_snp_req_tag), (snp_req_size - snp_req_ctr_next));
`endif
end

2
hw/rtl/VX_define.vh
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@@ -413,7 +413,7 @@
`define VX_CORE_TAG_WIDTH `L3CORE_TAG_WIDTH
`define VX_CSR_ID_WIDTH `LOG2UP(`NUM_CLUSTERS * `NUM_CORES)
`define DRAM_TO_BYTE_ADDR(x) {x, (32-$bits(x))'(0)}
`define TO_FULL_ADDR(x) {x, (32-$bits(x))'(0)}
`include "VX_types.vh"

12
hw/rtl/Vortex.v
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@@ -462,7 +462,7 @@ module Vortex (
`SCOPE_ASSIGN (reset, reset);
`SCOPE_ASSIGN (dram_req_fire, dram_req_valid && dram_req_ready);
`SCOPE_ASSIGN (dram_req_addr, {dram_req_addr, 4'b0});
`SCOPE_ASSIGN (dram_req_addr, `TO_FULL_ADDR(dram_req_addr));
`SCOPE_ASSIGN (dram_req_rw, dram_req_rw);
`SCOPE_ASSIGN (dram_req_byteen,dram_req_byteen);
`SCOPE_ASSIGN (dram_req_data, dram_req_data);
@@ -472,15 +472,15 @@ module Vortex (
`SCOPE_ASSIGN (dram_rsp_data, dram_rsp_data);
`SCOPE_ASSIGN (dram_rsp_tag, dram_rsp_tag);
`SCOPE_ASSIGN (snp_req_fire, snp_req_valid && snp_req_ready);
`SCOPE_ASSIGN (snp_req_addr, {snp_req_addr, 4'b0});
`SCOPE_ASSIGN (snp_req_fire, snp_req_valid && snp_req_ready);
`SCOPE_ASSIGN (snp_req_addr, `TO_FULL_ADDR(snp_req_addr));
`SCOPE_ASSIGN (snp_req_invalidate, snp_req_invalidate);
`SCOPE_ASSIGN (snp_req_tag, snp_req_tag);
`SCOPE_ASSIGN (snp_rsp_fire, snp_rsp_valid && snp_rsp_ready);
`SCOPE_ASSIGN (snp_rsp_fire, snp_rsp_valid && snp_rsp_ready);
`SCOPE_ASSIGN (snp_rsp_tag, snp_rsp_tag);
`SCOPE_ASSIGN (snp_rsp_fire, snp_rsp_valid && snp_rsp_ready);
`SCOPE_ASSIGN (snp_rsp_fire, snp_rsp_valid && snp_rsp_ready);
`SCOPE_ASSIGN (snp_rsp_tag, snp_rsp_tag);
`SCOPE_ASSIGN (busy, busy);
@@ -488,7 +488,7 @@ module Vortex (
`ifdef DBG_PRINT_DRAM
always @(posedge clk) begin
if (dram_req_valid && dram_req_ready) begin
$display("%t: DRAM req: rw=%b addr=%0h, tag=%0h, byteen=%0h data=%0h", $time, dram_req_rw, `DRAM_TO_BYTE_ADDR(dram_req_addr), dram_req_tag, dram_req_byteen, dram_req_data);
$display("%t: DRAM req: rw=%b addr=%0h, tag=%0h, byteen=%0h data=%0h", $time, dram_req_rw, `TO_FULL_ADDR(dram_req_addr), dram_req_tag, dram_req_byteen, dram_req_data);
end
if (dram_rsp_valid && dram_rsp_ready) begin
$display("%t: DRAM rsp: tag=%0h, data=%0h", $time, dram_rsp_tag, dram_rsp_data);

2
hw/rtl/cache/VX_cache_config.vh vendored
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@@ -80,6 +80,6 @@
`define LINE_TO_BYTE_ADDR(x, i) {x, (32-$bits(x))'(i << (32-$bits(x)-`BANK_SELECT_BITS))}
`define DRAM_TO_BYTE_ADDR(x) {x, (32-$bits(x))'(0)}
`define TO_FULL_ADDR(x) {x, (32-$bits(x))'(0)}
`endif

4
hw/rtl/cache/VX_snp_forwarder.v vendored
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@@ -201,10 +201,10 @@ module VX_snp_forwarder #(
`ifdef DBG_PRINT_CACHE_SNP
always @(posedge clk) begin
if (snp_req_valid && snp_req_ready) begin
$display("%t: cache%0d snp-fwd-req: addr=%0h, invalidate=%0d, tag=%0h", $time, CACHE_ID, `DRAM_TO_BYTE_ADDR(snp_req_addr), snp_req_invalidate, snp_req_tag);
$display("%t: cache%0d snp-fwd-req: addr=%0h, invalidate=%0d, tag=%0h", $time, CACHE_ID, `TO_FULL_ADDR(snp_req_addr), snp_req_invalidate, snp_req_tag);
end
if (snp_fwdout_valid[0] && snp_fwdout_ready[0]) begin
$display("%t: cache%0d snp-fwd-out: addr=%0h, invalidate=%0d, tag=%0h", $time, CACHE_ID, `DRAM_TO_BYTE_ADDR(snp_fwdout_addr[0]), snp_fwdout_invalidate[0], snp_fwdout_tag[0]);
$display("%t: cache%0d snp-fwd-out: addr=%0h, invalidate=%0d, tag=%0h", $time, CACHE_ID, `TO_FULL_ADDR(snp_fwdout_addr[0]), snp_fwdout_invalidate[0], snp_fwdout_tag[0]);
end
if (fwdin_valid && fwdin_ready) begin
$display("%t: cache%0d snp-fwd-in: tag=%0h", $time, CACHE_ID, fwdin_tag);