wu-arch/vortex
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7ae770f4eb5c8ca66c70e8dc1eb2ec0cbf1ae6ac
Commit Graph
288 Commits
Author SHA1 Message Date
Blaise Tine 6836f397f8 adding pulp fpu_div_sqrt_mvp submodule 2020-07-21 08:24:02 -07:00
Blaise Tine 0a56f96e69 scheduler optimization 2020-07-21 08:28:05 -07:00
Blaise Tine ff7f65bd1f opae build fixes 2020-07-21 05:44:13 -07:00
Blaise Tine dc7efbcfb4 pipeline refactoring 2020-07-21 05:22:47 -04:00
Blaise Tine e2100e9e87 pipeline refactoring 2020-07-20 09:38:54 -04:00
Blaise Tine 577a5791dc pipeline refactoring 2020-07-20 08:04:04 -04:00
Blaise Tine 25f66e6490 pipeline refactoring 2020-07-19 05:03:47 -04:00
trmontgomery ed3a0cfa4d added rsp map 2020-07-19 00:08:09 -04:00
Blaise Tine 9cf8bf6149 pipereg refactoring 2020-07-10 19:31:40 -04:00
Blaise Tine bdfacf709c yosys synthesis refactoring 2020-07-10 18:56:41 -04:00
Blaise Tine 77c3b2d45f lsu_unit refactoring to reduce critical path 2020-07-10 11:23:34 -07:00
Blaise Tine bca36e213e interfaces refactoring 2020-07-02 20:43:52 -07:00
Blaise Tine a5f4eb3d13 interfaces refactoring 2020-07-02 19:44:32 -07:00
Blaise Tine c5a64a0eed interfaces refactoring 2020-07-02 19:31:55 -07:00
Blaise Tine 5d088d67c8 Gather FPGA perf stats 2020-07-01 09:30:12 -07:00
Blaise Tine 9d1762e5e5 reverting stall_gpr_csr 2020-06-30 18:27:37 -07:00
Blaise Tine 18fe9cba30 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-30 18:20:59 -07:00
Blaise Tine 83a1695c73 OPAE CSR access 2020-06-30 18:14:06 -07:00
felsabbagh3 7d5ed7ac5f Removed stall dependancy on csr_req_if_valid 2020-06-30 12:03:55 -07:00
Blaise Tine 582a00d690 adding OPAE CSR support 2020-06-30 10:05:57 -07:00
Blaise Tine 1f5c4bf617 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-30 00:08:44 -07:00
Blaise Tine 2de61b5982 get device caps from CSRs 2020-06-30 00:08:23 -07:00
felsabbagh3 d7ef5f0bd7 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-29 23:00:53 -07:00
felsabbagh3 b8e8cab1ee Added CSR IO req/rsp V0.1 2020-06-29 23:00:34 -07:00
Blaise Tine f66c251309 minor update 2020-06-29 15:09:14 -07:00
Blaise Tine 75d66dc335 fix sources.txt, run_ase.sh 2020-06-29 12:52:28 -07:00
Blaise Tine a70562d386 set target synthesis freq=200 MHz, set 4-cores as default config, MULT.latency=1, DIV.latency=18 2020-06-29 08:03:19 -07:00
Blaise Tine d33916f1e0 minor update 2020-06-29 00:38:59 -07:00
felsabbagh3 0b7a869470 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-29 00:04:13 -07:00
felsabbagh3 14e4fd95b7 Don't allow snrq scheduling if there's a valid reqq entry (Event if it can't be scheduled) 2020-06-29 00:03:36 -07:00
Blaise Tine 21e04a0cb0 minor update 2020-06-28 22:58:18 -07:00
Blaise Tine 97668bf6f6 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-28 22:28:12 -07:00
Blaise Tine 7594067023 update 2020-06-28 21:50:24 -07:00
Blaise Tine 24aabd49d1 update 2020-06-28 21:49:15 -07:00
felsabbagh3 e919e452b9 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-28 20:01:49 -07:00
felsabbagh3 21566cdcd7 Fixed Single Core with Optimizations 2020-06-28 19:38:36 -07:00
Blaise Tine d89931d564 minor fix 2020-06-28 18:56:22 -07:00
Blaise Tine dfd183a1bb Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-28 15:36:39 -07:00
felsabbagh3 567376971e Added dram_fill_req_fast which is used to stall bank pipeline 2020-06-28 15:22:36 -07:00
Blaise Tine eb67788bf2 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-28 14:45:01 -07:00
Blaise Tine 27ea36440e multiplier fixes 2020-06-28 14:39:18 -07:00
felsabbagh3 ffb760cf73 Optimized cache writeback path by 1) VX_fair_arbiter and 2) Added a wb register between LSU and WB arbiter 2020-06-28 14:27:47 -07:00
felsabbagh3 c95d3cb22b Added cache critical path optimizations 2020-06-27 16:12:22 -07:00
Blaise Tine baf7d3bb92 minor update 2020-06-27 17:46:45 -04:00
Blaise Tine bc0c65dce7 Merge branch 'master' of https://github.gatech.edu/casl/Vortex 2020-06-27 13:56:44 -07:00
Blaise Tine 8302641510 fpga fixes 2020-06-27 14:03:20 -07:00
Blaise Tine 8a306de02d runtime static library 2020-06-27 14:13:13 -04:00
Blaise Tine b7d7e69f47 fixed assertion in lsu_unit 2020-06-26 00:27:55 -04:00
Blaise Tine e6cc221a44 refactoring 2020-06-23 10:59:30 -07:00
Blaise Tine 5e718c2676 refactoring 2020-06-23 09:54:40 -07:00