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dfd183a1bb9dd783bb1c3e8023af7da7abd60a8f
vortex/hw/rtl
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Blaise Tine dfd183a1bb Merge branch 'master' of https://github.gatech.edu/casl/Vortex
2020-06-28 15:36:39 -07:00
..
cache
Added dram_fill_req_fast which is used to stall bank pipeline
2020-06-28 15:22:36 -07:00
interfaces
refactoring
2020-06-23 10:59:30 -07:00
libs
Merge branch 'master' of https://github.gatech.edu/casl/Vortex
2020-06-28 14:45:01 -07:00
pipe_regs
refactoring
2020-06-23 10:59:30 -07:00
tex_unit
optimized opae cci to dev memcpy using double buffering and request window to work around unordered read requests
2020-04-23 01:30:45 -07:00
.DS_Store
project directories reorganization
2020-04-14 06:35:20 -04:00
.gitignore
fix opae build
2020-04-20 12:51:42 -07:00
Vortex.v
fpga fixes
2020-06-27 14:03:20 -07:00
VX_alu_unit.v
multiplier fixes
2020-06-28 14:39:18 -07:00
VX_back_end.v
Optimized cache writeback path by 1) VX_fair_arbiter and 2) Added a wb register between LSU and WB arbiter
2020-06-28 14:27:47 -07:00
VX_cluster.v
fpga fixes
2020-06-27 14:03:20 -07:00
VX_config.vh
fpga fixes
2020-06-27 14:03:20 -07:00
VX_core.v
fpga fixes
2020-06-27 14:03:20 -07:00
VX_csr_data.v
multicore fix
2020-05-10 08:30:04 -04:00
VX_csr_pipe.v
opae rtl fixes
2020-05-18 20:19:02 -07:00
VX_dcache_arb.v
fpga fixes
2020-06-27 14:03:20 -07:00
VX_decode.v
refactoring
2020-06-23 10:59:30 -07:00
VX_define.vh
multiplier fixes
2020-06-28 14:39:18 -07:00
VX_exec_unit.v
round robin arbiter + auto buffered queue + fixed dcache arbiter
2020-06-20 17:56:04 -04:00
VX_fetch.v
fixed warp_sched lock bug
2020-05-28 08:52:20 -04:00
VX_front_end.v
refactoring
2020-06-23 10:59:30 -07:00
VX_gpr_ram.v
multiplier fixes
2020-06-28 14:39:18 -07:00
VX_gpr_stage.v
refactoring
2020-06-23 10:59:30 -07:00
VX_gpr_wrapper.v
refactoring
2020-06-23 10:59:30 -07:00
VX_gpu_inst.v
scope refactoring + snoop invalidate
2020-06-12 00:04:31 -07:00
VX_icache_stage.v
fpga fixes
2020-06-27 14:03:20 -07:00
VX_inst_multiplex.v
refactoring
2020-06-23 10:59:30 -07:00
VX_lsu_unit.v
Optimized cache writeback path by 1) VX_fair_arbiter and 2) Added a wb register between LSU and WB arbiter
2020-06-28 14:27:47 -07:00
VX_mem_arb.v
round robin arbiter + auto buffered queue + fixed dcache arbiter
2020-06-20 17:56:04 -04:00
VX_mem_unit.v
fpga fixes
2020-06-27 14:03:20 -07:00
VX_pipeline.v
refactoring
2020-06-23 10:59:30 -07:00
VX_scheduler.v
fpga fixes
2020-06-27 14:03:20 -07:00
VX_scope.vh
minor update
2020-06-27 17:46:45 -04:00
VX_warp_sched.v
round robin arbiter + auto buffered queue + fixed dcache arbiter
2020-06-20 17:56:04 -04:00
VX_warp.v
opae fixes
2020-05-06 21:14:53 -07:00
VX_writeback.v
scope refactoring + snoop invalidate
2020-06-12 00:04:31 -07:00