Blaise Tine
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77bca2deca
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constant integration updates
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2020-11-16 02:39:53 -08:00 |
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Blaise Tine
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a1fcdd467a
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reset networks optimization
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2020-11-16 01:12:02 -08:00 |
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Blaise Tine
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1bc4b8e7a8
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constant integration updates, cache bank incoming_fill optimization
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2020-11-15 23:01:24 -08:00 |
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Blaise Tine
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2904f6441d
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constant integration updates
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2020-11-15 21:30:31 -08:00 |
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Blaise Tine
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5d58bf3d11
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fixed l3cache hang using memory arbiter in afu
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2020-11-15 06:36:32 -08:00 |
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Blaise Tine
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2e0f51af80
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fixed instr/cycle perf counter
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2020-11-12 11:41:25 -08:00 |
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Blaise Tine
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fceb561cbd
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synchronous reset network optimization: only reset register when required
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2020-11-11 20:54:54 -08:00 |
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Blaise Tine
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ce95c40aee
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fixed redundant cache fills
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2020-11-11 12:07:27 -05:00 |
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Blaise Tine
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d2bc820909
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Merge branch 'master' of https://github.com/vortexgpgpu/vortex-dev
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2020-11-10 14:01:58 -05:00 |
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Blaise Tine
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c1f23cf3ad
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fixed redundnat cache fill with dirty block, fixed cache tag_store critical path
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2020-11-10 08:32:34 -08:00 |
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Blaise Tine
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725322807e
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fixed DRAM response backpressure inside Cache
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2020-11-10 05:24:57 -08:00 |
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Blaise Tine
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7c384eaf7f
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fixed snoop forwarding hang
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2020-11-09 20:02:33 -08:00 |
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Blaise Tine
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f8d54c6994
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fixed cache_core_rsp_merge unit
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2020-11-09 02:10:35 -08:00 |
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Blaise Tine
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203a184008
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fixed bank_core_req_abr critical path
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2020-11-08 18:25:32 -08:00 |
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Blaise Tine
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10505caae1
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refactoring all arbiters with buffering for request count > 2, optimized the cache core response module in critical path when running as L2
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2020-11-08 01:31:46 -08:00 |
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Blaise Tine
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af2bb3b789
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cache fixes and opyimization - fmax moved from 162 mhz to 220 mhz!!!
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2020-11-05 03:49:50 -08:00 |
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Blaise Tine
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4c6a74fa87
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cache refactoring - phase 3 - added dedicated pipeline stage for tag access
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2020-11-04 03:21:30 -08:00 |
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Blaise Tine
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cd8ce20bd6
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minor improvement
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2020-11-03 17:08:26 -08:00 |
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Blaise Tine
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323d2a3b3e
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minor fix
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2020-11-03 15:34:35 -08:00 |
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Blaise Tine
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ba81d76e02
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cache refactoring - phase 2
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2020-11-03 04:51:40 -08:00 |
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trmontgomery
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4151ee197b
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per_bank_miss added to VX_cache.v
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2020-11-02 12:07:10 -05:00 |
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trmontgomery
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40a9fd3aaf
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miss output vector added to cache.v and bank.v
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2020-11-02 12:02:54 -05:00 |
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Blaise Tine
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5be1d85648
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cache refactoring (fixed redundant fill requests, merged fill and writeback queues), optimized priority encoder, fixed crs cycles count
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2020-11-02 01:50:12 -08:00 |
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Blaise Tine
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9a9f7955f0
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basic test timing + scope tracing ccip
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2020-10-27 17:04:04 -04:00 |
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Blaise Tine
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43ae82e788
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vlsim fix, verilator fst trace, use ram optimization
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2020-10-25 16:40:50 -07:00 |
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Blaise Tine
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e9d1754990
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Merge branch 'master' of https://github.com/vortexgpgpu/vortex-dev
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2020-10-20 11:49:35 -04:00 |
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Blaise Tine
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e6466b887c
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minor update
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2020-10-20 08:45:21 -07:00 |
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Blaise Tine
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7529f72c5d
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fixed OPAE crash, added custom bram module to controll rw collision, dogfood testcase argurment, optimzed buffered fifo, quartus build optimization flags
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2020-10-20 05:32:55 -07:00 |
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Blaise Tine
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32da50816f
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scope refactoring: adding modules definitions to VCD trace
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2020-10-12 23:26:02 -04:00 |
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Carter René Montgomery
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a83048b3bd
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Comments
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2020-10-06 14:50:56 -04:00 |
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Carter René Montgomery
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1f4af4777c
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Comments
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2020-10-06 14:35:46 -04:00 |
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Carter René Montgomery
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d2ab8d3cc6
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Added comments to prep for cache presentation
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2020-10-05 14:49:47 -04:00 |
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Blaise Tine
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4e1007e5b2
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scope refactoring
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2020-10-03 18:53:21 -04:00 |
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Blaise Tine
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f6f95e0c46
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mutiple fixes: parallel printf, fixed cycle in cache, opencl refactored vecadd and sgemm, regen opencl kernels with hard-float, fixed vortex io bus interface, fixed dpi floats APi to support multicore mode, make vlsim multicore default, make rtlsim multi-core default, removed POCL binaries from repository, updated Makefiles to use external POCL
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2020-09-19 14:45:42 -04:00 |
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Blaise Tine
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42e3b6c45d
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fixed lmp_mult parameters, ram init filepath
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2020-09-04 07:51:46 -07:00 |
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Blaise Tine
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31ffbe0d6a
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clean up 'stage_1_cycles' from cache
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2020-09-01 03:39:03 -07:00 |
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Blaise Tine
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af84e01856
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minor update
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2020-08-31 06:17:49 -07:00 |
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Blaise Tine
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0a0b28aac0
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minor update - 206-214 mhz
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2020-08-29 05:14:08 -07:00 |
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Blaise Tine
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f292e5003d
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quartus build fixes
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2020-08-23 22:04:46 -07:00 |
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Blaise Tine
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0b355f228e
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ibuffer addition
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2020-08-22 00:22:04 -07:00 |
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Blaise Tine
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6c12391338
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pipeline refactoring - fmax >= 222 mhz
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2020-08-14 21:50:14 -07:00 |
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Blaise Tine
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65415d2bbc
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getting dogfood tests passing on Verilator!
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2020-08-09 18:13:12 -04:00 |
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Blaise Tine
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cd29362d10
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fixed FPU handshake, optimized writeback's critical path
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2020-08-07 10:11:54 -07:00 |
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Blaise Tine
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31ee824862
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merged fpu_port branch
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2020-07-31 17:13:22 -04:00 |
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Blaise Tine
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4bdab8903e
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merge
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2020-07-31 16:49:59 -04:00 |
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Blaise Tine
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c9755a0c48
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lkg build with pipeline + FPU fixes
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2020-07-31 09:29:44 -04:00 |
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Blaise Tine
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c2dd0a8b39
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modelsim fixes && pipeline optimization
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2020-07-28 14:20:23 -07:00 |
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Blaise Tine
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7c86b68977
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pipeline refactoring: centralized issue buffer
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2020-07-26 11:21:08 -04:00 |
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Blaise Tine
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1f63f9da25
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new fpu implementation
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2020-07-24 00:00:37 -04:00 |
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Blaise Tine
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dc7efbcfb4
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pipeline refactoring
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2020-07-21 05:22:47 -04:00 |
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