minor update - mux reordering to reduce critical path on input data

hw/rtl/VX_ibuffer.v

@@ -82,8 +82,7 @@ module VX_ibuffer #(
 
             if (writing && is_slot0) begin                                                       
                 q_data_out[i] <= q_data_in;
-            end
-            if (pop) begin
+            end else if (pop) begin
                 q_data_out[i] <= q_data_prev[i];
             end                  
         end

hw/rtl/libs/VX_skid_buffer.v

@@ -81,9 +81,11 @@ module VX_skid_buffer #(
             always @(posedge clk) begin
                 if (push) begin
                     buffer <= data_in;
-                end
-                if (pop) begin
-                    data_out_r <= use_buffer ? buffer : data_in;
+                end                
+                if (pop && !use_buffer) begin
+                    data_out_r <= data_in;                    
+                end else if (pop) begin
+                    data_out_r <= buffer;
                 end
             end