wu-arch/vortex
1
0
Fork 0
Code Issues Pull Requests Actions Packages Projects Releases Wiki Activity

RTL code refactoring

Browse Source
This commit is contained in:
Blaise Tine
2020-04-21 01:03:37 -04:00
parent cfa8626bf7
commit ba4e736782
29 changed files with 332 additions and 563 deletions
Download Patch File Download Diff File Expand all files Collapse all files

18
hw/rtl/VX_gpr_wrapper.v
View File

@@ -7,8 +7,8 @@ module VX_gpr_wrapper (
VX_wb_if writeback_if,
VX_gpr_jal_if gpr_jal_if,
output wire[`NUM_THREADS-1:0][31:0] a_reg_data_o,
output wire[`NUM_THREADS-1:0][31:0] b_reg_data_o
output wire[`NUM_THREADS-1:0][31:0] a_reg_data,
output wire[`NUM_THREADS-1:0][31:0] b_reg_data
);
wire[`NUM_WARPS-1:0][`NUM_THREADS-1:0][31:0] temp_a_reg_data;
@@ -23,8 +23,8 @@ module VX_gpr_wrapper (
endgenerate
`ifndef ASIC
assign a_reg_data_o = (gpr_jal_if.is_jal ? jal_data : (temp_a_reg_data[gpr_read_if.warp_num]));
assign b_reg_data_o = (temp_b_reg_data[gpr_read_if.warp_num]);
assign a_reg_data = (gpr_jal_if.is_jal ? jal_data : (temp_a_reg_data[gpr_read_if.warp_num]));
assign b_reg_data = (temp_b_reg_data[gpr_read_if.warp_num]);
`else
wire zer = 0;
@@ -41,8 +41,8 @@ module VX_gpr_wrapper (
.out (old_warp_num)
);
assign a_reg_data_o = (gpr_jal_if.is_jal ? jal_data : (temp_a_reg_data[old_warp_num]));
assign b_reg_data_o = (temp_b_reg_data[old_warp_num]);
assign a_reg_data = (gpr_jal_if.is_jal ? jal_data : (temp_a_reg_data[old_warp_num]));
assign b_reg_data = (temp_b_reg_data[old_warp_num]);
`endif
@@ -54,11 +54,11 @@ module VX_gpr_wrapper (
VX_gpr gpr(
.clk (clk),
.reset (reset),
.valid_write_request_i (valid_write_request),
.valid_write_request (valid_write_request),
.gpr_read_if (gpr_read_if),
.writeback_if (writeback_if),
.a_reg_data_o (temp_a_reg_data[warp_index]),
.b_reg_data_o (temp_b_reg_data[warp_index])
.a_reg_data (temp_a_reg_data[warp_index]),
.b_reg_data (temp_b_reg_data[warp_index])
);
end