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stream arbiter update

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This commit is contained in:
Blaise Tine
2021-09-06 23:38:20 -07:00
parent 3e014c8285
commit af1cecae07
9 changed files with 26 additions and 21 deletions
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15
hw/rtl/VX_cluster.v
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@@ -147,13 +147,14 @@ module VX_cluster #(
`RESET_RELAY (mem_arb_reset); `RESET_RELAY (mem_arb_reset);
VX_mem_arb #( VX_mem_arb #(
.NUM_REQS (`NUM_CORES), .NUM_REQS (`NUM_CORES),
.DATA_WIDTH (`DMEM_DATA_WIDTH), .DATA_WIDTH (`DMEM_DATA_WIDTH),
.ADDR_WIDTH (`DMEM_ADDR_WIDTH), .ADDR_WIDTH (`DMEM_ADDR_WIDTH),
.TAG_IN_WIDTH (`XMEM_TAG_WIDTH), .TAG_IN_WIDTH (`XMEM_TAG_WIDTH),
.TAG_SEL_IDX (1), // Skip 0 for NC flag .TYPE ("R"),
.BUFFERED_REQ (1), .TAG_SEL_IDX (1), // Skip 0 for NC flag
.BUFFERED_RSP (1) .BUFFERED_REQ (1),
.BUFFERED_RSP (1)
) mem_arb ( ) mem_arb (
.clk (clk), .clk (clk),
.reset (mem_arb_reset), .reset (mem_arb_reset),

2
hw/rtl/VX_mem_arb.v
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@@ -8,7 +8,7 @@ module VX_mem_arb #(
parameter TAG_SEL_IDX = 0, parameter TAG_SEL_IDX = 0,
parameter BUFFERED_REQ = 0, parameter BUFFERED_REQ = 0,
parameter BUFFERED_RSP = 0, parameter BUFFERED_RSP = 0,
parameter TYPE = "R", parameter TYPE = "P",
localparam DATA_SIZE = (DATA_WIDTH / 8), localparam DATA_SIZE = (DATA_WIDTH / 8),
localparam LOG_NUM_REQS = `CLOG2(NUM_REQS), localparam LOG_NUM_REQS = `CLOG2(NUM_REQS),

3
hw/rtl/VX_mem_unit.v
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@@ -206,7 +206,7 @@ module VX_mem_unit # (
.LANES (`NUM_THREADS), .LANES (`NUM_THREADS),
.DATA_SIZE (4), .DATA_SIZE (4),
.TAG_IN_WIDTH (`DCORE_TAG_WIDTH), .TAG_IN_WIDTH (`DCORE_TAG_WIDTH),
.TYPE ("X"), .TYPE ("P"),
.BUFFERED_REQ (2), .BUFFERED_REQ (2),
.BUFFERED_RSP (1) .BUFFERED_RSP (1)
) smem_arb ( ) smem_arb (
@@ -316,6 +316,7 @@ module VX_mem_unit # (
.DATA_WIDTH (`DMEM_DATA_WIDTH), .DATA_WIDTH (`DMEM_DATA_WIDTH),
.ADDR_WIDTH (`DMEM_ADDR_WIDTH), .ADDR_WIDTH (`DMEM_ADDR_WIDTH),
.TAG_IN_WIDTH (`DMEM_TAG_WIDTH), .TAG_IN_WIDTH (`DMEM_TAG_WIDTH),
.TYPE ("R"),
.TAG_SEL_IDX (1), // Skip 0 for NC flag .TAG_SEL_IDX (1), // Skip 0 for NC flag
.BUFFERED_REQ (1), .BUFFERED_REQ (1),
.BUFFERED_RSP (2) .BUFFERED_RSP (2)

2
hw/rtl/VX_smem_arb.v
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@@ -8,7 +8,7 @@ module VX_smem_arb #(
parameter TAG_SEL_IDX = 0, parameter TAG_SEL_IDX = 0,
parameter BUFFERED_REQ = 0, parameter BUFFERED_REQ = 0,
parameter BUFFERED_RSP = 0, parameter BUFFERED_RSP = 0,
parameter TYPE = "R", parameter TYPE = "P",
localparam ADDR_WIDTH = (32-`CLOG2(DATA_SIZE)), localparam ADDR_WIDTH = (32-`CLOG2(DATA_SIZE)),
localparam DATA_WIDTH = (8 * DATA_SIZE), localparam DATA_WIDTH = (8 * DATA_SIZE),

13
hw/rtl/Vortex.v
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@@ -145,12 +145,13 @@ module Vortex (
`RESET_RELAY (mem_arb_reset); `RESET_RELAY (mem_arb_reset);
VX_mem_arb #( VX_mem_arb #(
.NUM_REQS (`NUM_CLUSTERS), .NUM_REQS (`NUM_CLUSTERS),
.DATA_WIDTH (`L3MEM_DATA_WIDTH), .DATA_WIDTH (`L3MEM_DATA_WIDTH),
.ADDR_WIDTH (`L3MEM_ADDR_WIDTH), .ADDR_WIDTH (`L3MEM_ADDR_WIDTH),
.TAG_IN_WIDTH (`L2MEM_TAG_WIDTH), .TAG_IN_WIDTH (`L2MEM_TAG_WIDTH),
.BUFFERED_REQ (1), .TYPE ("R"),
.BUFFERED_RSP (1) .BUFFERED_REQ (1),
.BUFFERED_RSP (1)
) mem_arb ( ) mem_arb (
.clk (clk), .clk (clk),
.reset (mem_arb_reset), .reset (mem_arb_reset),

1
hw/rtl/afu/VX_avs_wrapper.v
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@@ -149,6 +149,7 @@ module VX_avs_wrapper #(
VX_stream_arbiter #( VX_stream_arbiter #(
.NUM_REQS (AVS_BANKS), .NUM_REQS (AVS_BANKS),
.DATAW (AVS_DATA_WIDTH + REQ_TAG_WIDTH), .DATAW (AVS_DATA_WIDTH + REQ_TAG_WIDTH),
.TYPE ("R"),
.BUFFERED (OUTPUT_REG ? 1 : 0) .BUFFERED (OUTPUT_REG ? 1 : 0)
) rsp_arb ( ) rsp_arb (
.clk (clk), .clk (clk),

4
hw/rtl/afu/vortex_afu.sv
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@@ -519,9 +519,9 @@ VX_mem_arb #(
.DATA_WIDTH (LMEM_DATA_WIDTH), .DATA_WIDTH (LMEM_DATA_WIDTH),
.ADDR_WIDTH (LMEM_ADDR_WIDTH), .ADDR_WIDTH (LMEM_ADDR_WIDTH),
.TAG_IN_WIDTH (AVS_REQ_TAGW), .TAG_IN_WIDTH (AVS_REQ_TAGW),
.TYPE ("P"),
.BUFFERED_REQ (0), .BUFFERED_REQ (0),
.BUFFERED_RSP (0), .BUFFERED_RSP (0)
.TYPE ("X")
) mem_arb ( ) mem_arb (
.clk (clk), .clk (clk),
.reset (mem_arb_reset), .reset (mem_arb_reset),

3
hw/rtl/cache/VX_cache.v vendored
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@@ -617,7 +617,8 @@ module VX_cache #(
VX_stream_arbiter #( VX_stream_arbiter #(
.NUM_REQS (NUM_BANKS), .NUM_REQS (NUM_BANKS),
.DATAW (`MEM_ADDR_WIDTH + MSHR_ADDR_WIDTH + 1 + NUM_PORTS * (1 + WORD_SIZE + WORD_SELECT_BITS + `WORD_WIDTH)), .DATAW (`MEM_ADDR_WIDTH + MSHR_ADDR_WIDTH + 1 + NUM_PORTS * (1 + WORD_SIZE + WORD_SELECT_BITS + `WORD_WIDTH)),
.BUFFERED (1) .BUFFERED (1),
.TYPE ("R")
) mem_req_arb ( ) mem_req_arb (
.clk (clk), .clk (clk),
.reset (mreq_reset), .reset (mreq_reset),

4
hw/rtl/libs/VX_stream_arbiter.v
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@@ -4,7 +4,7 @@ module VX_stream_arbiter #(
parameter NUM_REQS = 1, parameter NUM_REQS = 1,
parameter LANES = 1, parameter LANES = 1,
parameter DATAW = 1, parameter DATAW = 1,
parameter TYPE = "R", parameter TYPE = "P",
parameter LOCK_ENABLE = 1, parameter LOCK_ENABLE = 1,
parameter BUFFERED = 0 parameter BUFFERED = 0
) ( ) (
@@ -41,7 +41,7 @@ module VX_stream_arbiter #(
assign sel_ready = ready_in_sel; assign sel_ready = ready_in_sel;
end end
if (TYPE == "X") begin if (TYPE == "P") begin
`UNUSED_VAR (sel_ready) `UNUSED_VAR (sel_ready)
VX_lzc #( VX_lzc #(
.N (NUM_REQS) .N (NUM_REQS)