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Synthesis Cleanup 1

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This commit is contained in:
felsabbagh3
2019-10-28 13:43:12 -04:00
parent 88eab9e746
commit a8d063e9ad
12 changed files with 2602 additions and 40 deletions
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2
rtl/byte_enabled_simple_dual_port_ram.v
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@@ -25,7 +25,7 @@ module byte_enabled_simple_dual_port_ram
integer ini;
always@(posedge clk, posedge reset) begin
if (reset) begin
for (ini = 0; ini < 32; ini = ini + 1) GPR[ini] = 0;
for (ini = 0; ini < 32; ini = ini + 1) GPR[ini] <= 0;
end else if(we) begin
integer thread_ind;
for (thread_ind = 0; thread_ind <= `NT_M1; thread_ind = thread_ind + 1) begin