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RTL code refactoring

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Blaise Tine
2020-04-19 03:38:00 -04:00
parent 460aabf6b1
commit 9b476f1e17
97 changed files with 3127 additions and 18563 deletions
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10
hw/rtl/interfaces/VX_icache_request_inter.v
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@@ -6,11 +6,11 @@
interface VX_icache_request_inter ();
wire[31:0] pc_address;
wire[2:0] out_cache_driver_in_mem_read;
wire[2:0] out_cache_driver_in_mem_write;
wire out_cache_driver_in_valid;
wire[31:0] out_cache_driver_in_data;
wire [31:0] pc_address;
wire [2:0] out_cache_driver_in_mem_read;
wire [2:0] out_cache_driver_in_mem_write;
wire out_cache_driver_in_valid;
wire [31:0] out_cache_driver_in_data;
endinterface