tex_unit code refactoring

2021-03-22 10:41:50 -04:00
parent 82a9aee417
commit 97041e8e82
5 changed files with 8 additions and 155 deletions
--- a/hw/rtl/tex_unit/VX_tex_sampler.v
+++ b/hw/rtl/tex_unit/VX_tex_sampler.v
@@ -79,7 +79,6 @@ module VX_tex_sampler #(
            );    

        end
-
    end

    assign stall_out = ~rsp_ready;
@@ -96,8 +95,4 @@ module VX_tex_sampler #(
        .data_out ({rsp_valid, rsp_wid, rsp_tmask, rsp_PC, rsp_rd, rsp_wb, rsp_data})
    );

-
-
-
-
 endmodule