Set associative bank working

rtl/modelsim/Makefile

@@ -68,6 +68,7 @@ SRC = \
 ../cache/VX_d_cache.v \
 ../cache/VX_generic_pe.v \
 ../cache/cache_set.v \
+../cache/VX_cache_data_per_index.v \
 ../pipe_regs/VX_d_e_reg.v \
 ../pipe_regs/VX_f_d_reg.v \
 ../shared_memory/VX_bank_valids.v \
@@ -103,7 +104,7 @@ LOG=
 #           vlib 
 
 comp:
-	vlog -O0 $(OPT) -work $(LIB) $(SRC)
+	vlog $(OPT) -work $(LIB) $(SRC)
 	# vlog -O0 -dpiheader vortex_dpi.h $(OPT) -work $(LIB) $(SRC)
 
 

rtl/modelsim/vortex_dpi.cpp

@@ -24,6 +24,7 @@ RAM ram;
 bool     refill;
 unsigned refill_addr;
 
+unsigned num_cycles;
 
 unsigned getIndex(int, int, int);
 unsigned getIndex(int r, int c, int numCols)
@@ -48,6 +49,7 @@ void ibus_driver(bool clk, unsigned pc_addr, unsigned * instruction)
 	// printf("Inside ibus_driver\n");
     if (clk)
     {
+        num_cycles++;
         (*instruction) = 0;
     }
     else
@@ -199,6 +201,7 @@ void io_handler(bool clk, bool io_valid, unsigned io_data)
 
 void gracefulExit()
 {
+    fprintf(stderr, "Num Cycles: %d\n", num_cycles);
     fprintf(stderr, "\n*********************\n\n");
 }