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new cache states

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This commit is contained in:
felsabbagh3
2019-10-23 15:07:14 -04:00
parent b4d921f49a
commit 6340ffcc2a
4 changed files with 661 additions and 480 deletions
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12
rtl/VX_dmem_controller.v
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@@ -33,7 +33,7 @@ module VX_dmem_controller (
wire[`NT_M1:0][31:0] sm_driver_out_data;
wire[`NT_M1:0] cache_driver_out_valid; // Not used for now
wire sm_delay;
wire cache_delay;
wire cache_done;
VX_shared_memory #(.NB(7), .BITS_PER_BANK(3)) shared_memory (
@@ -49,18 +49,15 @@ module VX_dmem_controller (
);
VX_d_cache dcache(
.clk (clk),
.rst (reset),
.i_p_valid (cache_driver_in_valid),
.i_p_valid (cache_driver_in_valid),
.i_p_addr (cache_driver_in_address),
.i_p_initial_request(),
.i_p_writedata (cache_driver_in_data),
.i_p_read_or_write (read_or_write),
.o_p_readdata (cache_driver_out_data),
.o_p_readdata_valid (),
.o_p_waitrequest (cache_delay),
.o_p_waitrequest (cache_done),
.o_m_addr (VX_dram_req_rsp.o_m_addr),
.o_m_valid (VX_dram_req_rsp.o_m_valid),
.o_m_writedata (VX_dram_req_rsp.o_m_writedata),
@@ -71,7 +68,8 @@ module VX_dmem_controller (
assign VX_dcache_rsp.in_cache_driver_out_data = to_shm ? sm_driver_out_data : cache_driver_out_data;
assign VX_dcache_rsp.delay = sm_delay || cache_delay;
// assign VX_dcache_rsp.delay = sm_delay;
assign VX_dcache_rsp.delay = sm_delay || (!cache_done);
endmodule