New RF with Evaluation

This commit is contained in:
felsabbagh3
2019-09-11 01:04:23 -04:00
parent 8d143d7739
commit 3c3a443bd5
70 changed files with 5745 additions and 219365 deletions

View File

@@ -47,10 +47,10 @@ module VX_gpr_syn (
// wire[`NT_M1:0][31:0] jal_data;
// genvar index;
// for (index = 0; index <= `NT_M1; index = index + 1) assign jal_data[index] = VX_gpr_jal.curr_PC;
// for (index = 0; index <= `NT_M1; index = index + 1) assign jal_data[index] = 0;
// assign out_a_reg_data = VX_gpr_jal.is_jal ? jal_data : temp_a_reg_data[VX_gpr_read.warp_num];
// assign out_a_reg_data = 0 ? jal_data : temp_a_reg_data[VX_gpr_read.warp_num];
// assign out_b_reg_data = temp_b_reg_data[VX_gpr_read.warp_num];
@@ -63,7 +63,7 @@ module VX_gpr_syn (
// wire curr_warp_zero = VX_gpr_read.warp_num == 0;
// wire context_zero_valid = (VX_writeback_inter.wb_warp_num == 0);
// wire real_zero_isclone = VX_gpr_clone.is_clone && (VX_gpr_clone.warp_num == 0);
// wire real_zero_isclone = 0;
// wire write_register = (VX_writeback_inter.wb != 2'h0) ? (1'b1) : (1'b0);
@@ -76,10 +76,10 @@ module VX_gpr_syn (
// .in_src1 (VX_gpr_read.rs1),
// .in_src2 (VX_gpr_read.rs2),
// .in_is_clone (real_zero_isclone),
// .in_src1_fwd (VX_fwd_rsp.src1_fwd),
// .in_src1_fwd_data (VX_fwd_rsp.src1_fwd_data),
// .in_src2_fwd (VX_fwd_rsp.src2_fwd),
// .in_src2_fwd_data (VX_fwd_rsp.src2_fwd_data),
// .in_src1_fwd (0),
// .in_src1_fwd_data (0),
// .in_src2_fwd (0),
// .in_src2_fwd_data (0),
// .in_write_register(write_register),
// .in_write_data (VX_writeback_inter.write_data),
// .out_a_reg_data (temp_a_reg_data[0]),
@@ -93,8 +93,8 @@ module VX_gpr_syn (
// for (r = 1; r < `NW; r = r + 1) begin
// wire context_glob_valid = (VX_writeback_inter.wb_warp_num == r);
// wire curr_warp_glob = VX_gpr_read.warp_num == r;
// wire real_wspawn = VX_gpr_wspawn.is_wspawn && (VX_gpr_wspawn.which_wspawn == r);
// wire real_isclone = VX_gpr_clone.is_clone && (VX_gpr_clone.warp_num == r);
// wire real_wspawn = 0;
// wire real_isclone = 0;
// VX_context_slave VX_Context_one(
// .clk (clk),
// .in_warp (curr_warp_glob),
@@ -104,10 +104,10 @@ module VX_gpr_syn (
// .in_src1 (VX_gpr_read.rs1),
// .in_src2 (VX_gpr_read.rs2),
// .in_is_clone (real_isclone),
// .in_src1_fwd (VX_fwd_rsp.src1_fwd),
// .in_src1_fwd_data (VX_fwd_rsp.src1_fwd_data),
// .in_src2_fwd (VX_fwd_rsp.src2_fwd),
// .in_src2_fwd_data (VX_fwd_rsp.src2_fwd_data),
// .in_src1_fwd (0),
// .in_src1_fwd_data (0),
// .in_src2_fwd (0),
// .in_src2_fwd_data (0),
// .in_write_register(write_register),
// .in_write_data (VX_writeback_inter.write_data),
// .in_wspawn_regs (w0_t0_registers),
@@ -149,25 +149,6 @@ module VX_gpr_syn (
assign out_gpr_stall = 0;
// // WSPAWN FSM
// reg[3:0] wspawn_state;
// VX_gpr_read_inter VX_wspawn_gpr_read();
// VX_wb_inter VX_wspawn_wb_inter();
// VX_wspawn_gpr_read.rs1
// always @(posedge clk) begin
// if ((in_wspawn) && wspawn_state == 0) begin
// wspawn_state <= 10;
// end else if (wspawn_state == 1) begin
// wspawn_state <= 0;
// end else if (wspawn_state > 0) begin
// wspawn_state <= wspawn_state - 1;
// end
// end
// assign out_gpr_stall = ((wspawn_state == 0) && VX_gpr_wspawn.is_wspawn) || (VX_gpr_wspawn.is_wspawn > 1);;
endmodule