new fpu implementation
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@@ -10,7 +10,7 @@ interface VX_commit_if ();
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wire [31:0] curr_PC;
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wire [`NUM_THREADS-1:0][31:0] data;
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wire [`NR_BITS-1:0] rd;
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wire wb;
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wire wb;
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wire ready;
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endinterface
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@@ -27,8 +27,9 @@ interface VX_decode_if ();
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// FP states
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wire [`NR_BITS-1:0] rs3;
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wire use_rs3;
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wire rd_is_fp;
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wire rs1_is_fp;
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wire rs2_is_fp;
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wire rs2_is_fp;
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wire [`FRM_BITS-1:0] frm;
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wire wb;
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@@ -5,11 +5,8 @@
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interface VX_fpu_from_csr_if ();
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`IGNORE_WARNINGS_BEGIN
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wire [`NUM_WARPS-1:0][`FRM_BITS-1:0] frm;
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`IGNORE_WARNINGS_END
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wire [`NW_BITS-1:0] warp_num;
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wire [`FRM_BITS-1:0] frm;
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endinterface
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@@ -14,6 +14,7 @@ interface VX_fpu_req_if ();
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wire wb;
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wire [`NR_BITS-1:0] rd;
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wire rd_is_fp;
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wire [`NUM_THREADS-1:0][31:0] rs1_data;
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wire [`NUM_THREADS-1:0][31:0] rs2_data;
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@@ -5,7 +5,6 @@
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interface VX_fpu_to_csr_if ();
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`IGNORE_WARNINGS_BEGIN
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wire valid;
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wire [`NW_BITS-1:0] warp_num;
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@@ -16,8 +15,6 @@ interface VX_fpu_to_csr_if ();
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wire fflags_UF;
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wire fflags_NX;
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`IGNORE_WARNINGS_END
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endinterface
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`endif
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@@ -8,8 +8,8 @@ interface VX_wb_if ();
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wire [`NUM_THREADS-1:0] valid;
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wire [`NW_BITS-1:0] warp_num;
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wire [`NR_BITS-1:0] rd;
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wire [`NUM_THREADS-1:0][31:0] data;
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wire is_fp;
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wire rd_is_fp;
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wire [`NUM_THREADS-1:0][31:0] data;
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wire ready;
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endinterface
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