Hansung Kim 6b97b77572 Revert SimMemTrace.v to use posedge clock ...

Doing function calls inside @(*) causes lint errors.  Instead, remove
staging registers to eliminate 1 cycle latency between DPI call and
when output is visible to Chisel.

2023-05-08 00:14:48 -07:00

src

Revert SimMemTrace.v to use posedge clock

2023-05-08 00:14:48 -07:00

.scalafmt.conf

Add .scalafmt.conf

2023-03-27 14:38:02 -07:00

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