Hansung Kim
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0589b310f1
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Add missing parameters for VX_cache_top
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2023-11-28 20:32:49 -08:00 |
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Hansung Kim
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6248926b47
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Remove icache-specific address set and naming
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2023-11-28 20:08:46 -08:00 |
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Hansung Kim
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74fe530105
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Enable configuring MSHR size from Chisel
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2023-11-28 19:55:23 -08:00 |
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Hansung Kim
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f8d7169d19
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Delete old addResource for vortex v1
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2023-11-28 19:44:02 -08:00 |
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Hansung Kim
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0d60180d0d
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Change NUM_WAYS from 1 to 4
NUM_WAYS = 1 seem to be broken in Vortex. This makes sgemm test pass
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2023-11-28 18:43:25 -08:00 |
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Hansung Kim
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d45cf835cf
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Remove dedicated icache bank from VortexBank
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2023-11-28 18:42:58 -08:00 |
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Hansung Kim
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b66be6c3ae
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Respect VX_cache's MEM_TAG_WIDTH; rename coalToVxCacheNode
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2023-11-28 16:54:50 -08:00 |
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Hansung Kim
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c5e37dd3b8
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Rename l2ReqSourceGenSize -> memSideSourceIds
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2023-11-28 14:55:52 -08:00 |
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Hansung Kim
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f187291a9c
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VortexBank: Update addResource for vortex2; WIP fix params
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2023-11-28 12:51:34 -08:00 |
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Hansung Kim
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0768a7abc9
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More cleanup and doc
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2023-11-10 18:49:11 -08:00 |
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Hansung Kim
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ecfa18ce69
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Rename to VortexBank
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2023-11-10 17:46:04 -08:00 |
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