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tensor: Fix typo, reduce resp queue depth

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This commit is contained in:
Hansung Kim
2024-10-18 22:54:48 -07:00
parent 0aadc6074a
commit e946403d78
1 changed files with 2 additions and 2 deletions
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4
src/main/scala/radiance/core/TensorCoreDecoupled.scala
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@@ -225,7 +225,7 @@ class TensorCoreDecoupled(
when (lastReqA && io.reqA.fire) { doneReqA := true.B }
when (lastReqB && io.reqB.fire) { doneReqB := true.B }
val genReqA = (state === AccessorState.access) && !doneReqA
val genReqB = (state === AccessorState.access) && !doneReqA
val genReqB = (state === AccessorState.access) && !doneReqB
when (state === AccessorState.finish) {
doneReqA := false.B
doneReqB := false.B
@@ -272,7 +272,7 @@ class TensorCoreDecoupled(
//
// Backend of the decoupled access/execute pipeline.
//
val respQueueDepth = 8 // FIXME: parameterize
val respQueueDepth = 2 // FIXME: parameterize
val respQueueA = Queue(respATagged, respQueueDepth)
val respQueueB = Queue(respBTagged, respQueueDepth)