Redundant call syntax
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@@ -54,7 +54,7 @@ case class CoalescerConfig(
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sizeEnum: InFlightTableSizeEnum,
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sizeEnum: InFlightTableSizeEnum,
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) {
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) {
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// maximum coalesced size
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// maximum coalesced size
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def maxCoalLogSize(): Int = coalLogSizes.max
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def maxCoalLogSize: Int = coalLogSizes.max
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}
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}
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object defaultConfig extends CoalescerConfig(
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object defaultConfig extends CoalescerConfig(
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@@ -255,7 +255,7 @@ class MonoCoalescer(coalLogSize: Int, windowT: CoalShiftQueue[ReqQueueEntry],
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// number of entries matched with this leader lane's head.
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// number of entries matched with this leader lane's head.
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// maximum is numLanes * queueDepth
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// maximum is numLanes * queueDepth
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val matchCount = Output(UInt(log2Ceil(config.numLanes * config.queueDepth + 1).W))
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val matchCount = Output(UInt(log2Ceil(config.numLanes * config.queueDepth + 1).W))
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val coverageHits = Output(UInt((1 << config.maxCoalLogSize()).W))
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val coverageHits = Output(UInt((1 << config.maxCoalLogSize).W))
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})
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})
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})
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})
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@@ -385,7 +385,7 @@ class MultiCoalescer(windowT: CoalShiftQueue[ReqQueueEntry], coalReqT: ReqQueueE
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def normalize(valPerSize: Seq[UInt]): Seq[UInt] = {
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def normalize(valPerSize: Seq[UInt]): Seq[UInt] = {
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(valPerSize zip config.coalLogSizes).map { case (hits, size) =>
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(valPerSize zip config.coalLogSizes).map { case (hits, size) =>
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(hits << (config.maxCoalLogSize() - size).U).asUInt
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(hits << (config.maxCoalLogSize - size).U).asUInt
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}
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}
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}
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}
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@@ -405,7 +405,7 @@ class MultiCoalescer(windowT: CoalShiftQueue[ReqQueueEntry], coalReqT: ReqQueueE
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val chosenSizeIdx = Wire(UInt(log2Ceil(config.coalLogSizes.size).W))
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val chosenSizeIdx = Wire(UInt(log2Ceil(config.coalLogSizes.size).W))
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val chosenValid = Wire(Bool())
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val chosenValid = Wire(Bool())
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// minimum 25% coverage
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// minimum 25% coverage
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val minCoverage = 1.max(1 << ((config.maxCoalLogSize() - 2) - 2))
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val minCoverage = 1.max(1 << ((config.maxCoalLogSize - 2) - 2))
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when (normalizedHits.map(_ > minCoverage.U).reduce(_ || _)) {
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when (normalizedHits.map(_ > minCoverage.U).reduce(_ || _)) {
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chosenSizeIdx := argMax(normalizedHits)
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chosenSizeIdx := argMax(normalizedHits)
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@@ -443,8 +443,8 @@ class MultiCoalescer(windowT: CoalShiftQueue[ReqQueueEntry], coalReqT: ReqQueueE
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// note: this is word-level coalescing. if finer granularity is needed, need to modify code
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// note: this is word-level coalescing. if finer granularity is needed, need to modify code
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val numWords = (1.U << (chosenSize - config.wordWidth.U)).asUInt
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val numWords = (1.U << (chosenSize - config.wordWidth.U)).asUInt
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val maxWords = 1 << (config.maxCoalLogSize() - config.wordWidth)
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val maxWords = 1 << (config.maxCoalLogSize - config.wordWidth)
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val addrMask = Wire(UInt(config.maxCoalLogSize().W))
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val addrMask = Wire(UInt(config.maxCoalLogSize.W))
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addrMask := (1.U << chosenSize).asUInt - 1.U
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addrMask := (1.U << chosenSize).asUInt - 1.U
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val data = Wire(Vec(maxWords, UInt((config.wordSizeInBytes * 8).W)))
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val data = Wire(Vec(maxWords, UInt((config.wordSizeInBytes * 8).W)))
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@@ -452,7 +452,7 @@ class MultiCoalescer(windowT: CoalShiftQueue[ReqQueueEntry], coalReqT: ReqQueueE
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for (i <- 0 until maxWords) {
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for (i <- 0 until maxWords) {
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val sel = flatReqs.zip(flatMatches).map { case (req, m) =>
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val sel = flatReqs.zip(flatMatches).map { case (req, m) =>
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m && ((req.address(config.maxCoalLogSize() - 1, 0) & addrMask) === i.U)
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m && ((req.address(config.maxCoalLogSize - 1, 0) & addrMask) === i.U)
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}
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}
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// TODO: SW uses priority encoder, not sure about behavior of MuxCase
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// TODO: SW uses priority encoder, not sure about behavior of MuxCase
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data(i) := MuxCase(DontCare, flatReqs.zip(sel).map { case (req, s) =>
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data(i) := MuxCase(DontCare, flatReqs.zip(sel).map { case (req, s) =>
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@@ -505,7 +505,7 @@ class CoalescingUnitImp(outer: CoalescingUnit, config: CoalescerConfig) extends
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Module(new CoalShiftQueue(reqQueueEntryT, config.queueDepth))
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Module(new CoalShiftQueue(reqQueueEntryT, config.queueDepth))
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}
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}
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val coalReqT = new ReqQueueEntry(sourceWidth, log2Ceil(config.maxCoalLogSize()), config.addressWidth, config.maxCoalLogSize())
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val coalReqT = new ReqQueueEntry(sourceWidth, log2Ceil(config.maxCoalLogSize), config.addressWidth, config.maxCoalLogSize)
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val coalescer = Module(new MultiCoalescer(reqQueues.head, coalReqT, config))
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val coalescer = Module(new MultiCoalescer(reqQueues.head, coalReqT, config))
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coalescer.io.window := reqQueues.map(_.io)
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coalescer.io.window := reqQueues.map(_.io)
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@@ -575,7 +575,7 @@ class CoalescingUnitImp(outer: CoalescingUnit, config: CoalescerConfig) extends
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// coalesced request. Upper bound is min(DEPTH, 2**sourceWidth).
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// coalesced request. Upper bound is min(DEPTH, 2**sourceWidth).
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val numPerLaneReqs = config.queueDepth
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val numPerLaneReqs = config.queueDepth
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val respQueueEntryT = new RespQueueEntry(sourceWidth, log2Ceil(config.maxCoalLogSize()), config.maxCoalLogSize())
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val respQueueEntryT = new RespQueueEntry(sourceWidth, log2Ceil(config.maxCoalLogSize), config.maxCoalLogSize)
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val respQueues = Seq.tabulate(config.numLanes) { _ =>
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val respQueues = Seq.tabulate(config.numLanes) { _ =>
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Module(
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Module(
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new MultiPortQueue(
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new MultiPortQueue(
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@@ -695,7 +695,7 @@ class CoalescingUnitImp(outer: CoalescingUnit, config: CoalescerConfig) extends
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newEntry.source := coalescer.io.outReq.bits.source
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newEntry.source := coalescer.io.outReq.bits.source
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// TODO: richard to write table fill logic
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// TODO: richard to write table fill logic
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assert (config.maxCoalLogSize() <= config.dataBusWidth,
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assert (config.maxCoalLogSize <= config.dataBusWidth,
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"multi-beat coalesced reads/writes are currently not supported")
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"multi-beat coalesced reads/writes are currently not supported")
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assert (
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assert (
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tlCoal.params.dataBits == (1 << config.dataBusWidth) * 8,
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tlCoal.params.dataBits == (1 << config.dataBusWidth) * 8,
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@@ -708,7 +708,7 @@ class CoalescingUnitImp(outer: CoalescingUnit, config: CoalescerConfig) extends
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// TODO: this part needs the actual coalescing logic to work
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// TODO: this part needs the actual coalescing logic to work
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r.valid := false.B
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r.valid := false.B
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r.source := origReqs(i).source
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r.source := origReqs(i).source
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r.offset := (origReqs(i).address % (1 << config.maxCoalLogSize()).U) >> config.wordWidth
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r.offset := (origReqs(i).address % (1 << config.maxCoalLogSize).U) >> config.wordWidth
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r.sizeEnum := config.sizeEnum.logSizeToEnum(origReqs(i).size)
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r.sizeEnum := config.sizeEnum.logSizeToEnum(origReqs(i).size)
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}
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}
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}
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}
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@@ -762,7 +762,7 @@ class CoalescingUnitImp(outer: CoalescingUnit, config: CoalescerConfig) extends
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// FIXME: overlaps with RespQueueEntry. Trait-ify
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// FIXME: overlaps with RespQueueEntry. Trait-ify
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class CoalescedResponseBundle(config: CoalescerConfig) extends Bundle {
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class CoalescedResponseBundle(config: CoalescerConfig) extends Bundle {
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val source = UInt(log2Ceil(config.numNewSrcIds).W)
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val source = UInt(log2Ceil(config.numNewSrcIds).W)
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val data = UInt((8 * (1 << config.maxCoalLogSize())).W)
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val data = UInt((8 * (1 << config.maxCoalLogSize)).W)
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}
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}
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class UncoalescingUnit(config: CoalescerConfig) extends Module {
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class UncoalescingUnit(config: CoalescerConfig) extends Module {
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@@ -871,7 +871,7 @@ class InflightCoalReqTable(config: CoalescerConfig) extends Module {
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config.numLanes,
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config.numLanes,
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config.queueDepth,
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config.queueDepth,
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log2Ceil(config.numOldSrcIds),
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log2Ceil(config.numOldSrcIds),
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config.maxCoalLogSize(),
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config.maxCoalLogSize,
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config.sizeEnum
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config.sizeEnum
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)
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)
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