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Communicate trace cycle data from C++ to Chisel

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This commit is contained in:
Hansung Kim
2023-02-27 14:40:49 -08:00
parent 72de4bca66
commit 0ebaed5f1b
3 changed files with 36 additions and 33 deletions
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12
src/main/resources/vsrc/SimMemTrace.v
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@@ -1,4 +1,4 @@
`define DATA_WIDTH 8
`define DATA_WIDTH 64
import "DPI-C" function void memtrace_init(
input string filename
@@ -8,7 +8,7 @@ import "DPI-C" function void memtrace_tick
(
output bit trace_read_valid,
input bit trace_read_ready,
output byte trace_read_bits
output longint trace_read_bits
);
module SimMemTrace (
@@ -21,7 +21,7 @@ module SimMemTrace (
);
bit __in_valid;
byte __in_bits;
longint __in_bits;
string __uartlog;
int __uartno;
@@ -39,10 +39,10 @@ module SimMemTrace (
// Evaluate the signals on the positive edge
always @(posedge clock) begin
if (reset) begin
__in_valid = 0;
__in_valid = 1'b0;
__in_valid_reg <= 0;
__in_bits_reg <= 0;
__in_valid_reg <= 1'b0;
__in_bits_reg <= `DATA_WIDTH'b0;
end else begin
memtrace_tick(
__in_valid,