Blaise Tine
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7b8fe11e6a
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unused variables refactoring
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2021-08-05 01:46:26 -07:00 |
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Blaise Tine
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f54d2b6272
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minor update
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2021-07-15 14:39:41 -07:00 |
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Blaise Tine
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0bec734532
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icache readonly optimization
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2021-07-15 14:16:05 -07:00 |
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Blaise Tine
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5d2437d887
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refactoring cache_config
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2021-05-27 14:41:46 -07:00 |
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Blaise Tine
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062d02ddce
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Merge branch 'master' of https://github.gatech.edu/casl/Vortex
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2021-03-04 20:51:03 -08:00 |
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Blaise Tine
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7560202f8b
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cache bank refactoring - removing unecessary core response fifo & restoring single port data access
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2021-02-21 21:47:46 -08:00 |
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Blaise Tine
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ccb74ef286
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cache data access with decoupled read/write ports
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2021-02-21 15:18:24 -08:00 |
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Blaise Tine
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05f93fac20
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minor update
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2021-02-20 13:15:15 -08:00 |
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Blaise Tine
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665b97b810
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multi-ported cache support for streaming
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2021-02-08 16:13:32 -08:00 |
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Blaise Tine
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111cc29482
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minor update
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2021-02-04 15:28:04 -08:00 |
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Blaise Tine
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62ff97d6e1
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minor update - smem perf update
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2021-02-01 10:29:20 -08:00 |
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Blaise Tine
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74a687e395
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minor updates
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2021-01-18 05:43:30 -08:00 |
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Blaise Tine
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a046bd7a73
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cache pipeline optimization
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2021-01-17 17:19:52 -08:00 |
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Blaise Tine
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a69ba5ad7b
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cache flush support
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2021-01-17 05:50:29 -08:00 |
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Blaise Tine
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d4e7b28be8
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cache refactoring
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2021-01-17 00:18:56 -08:00 |
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Blaise Tine
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fcbf57b66a
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specialized shared memory module
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2021-01-16 04:41:58 -08:00 |
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Blaise Tine
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e770824d47
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fixed afu cci write bug, fixed profile cache write miss bug, fixed bram byteenable inferance
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2021-01-10 20:26:15 -08:00 |
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Blaise Tine
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06945533cf
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fixed l2/l3 caches related bugs
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2021-01-09 16:32:55 -08:00 |
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Blaise Tine
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762b8e2e3e
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fixed cache mshr critical path
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2021-01-04 12:49:40 -05:00 |
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Blaise Tine
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4d55118545
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cache pipeline optimization - moved tag access to stage0
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2021-01-03 23:10:41 -05:00 |
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Blaise Tine
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2d69ca5d67
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scratchpad optimization for stack access using custom bank offset aligned to stack size
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2021-01-02 16:00:00 -05:00 |
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Blaise Tine
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b2cfde5d6d
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enabling shared memory back
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2020-12-31 19:19:14 -08:00 |
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Blaise Tine
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abe32ed553
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cache optimization - moved read requests to stage1 and eliminating stage3
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2020-12-31 07:40:58 -08:00 |
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Blaise Tine
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703a861fe9
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added support for write-through cache, removed cache snooping support
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2020-12-23 23:51:02 -08:00 |
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Blaise Tine
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4bbd7bf408
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performance refactoring - rebalanced stream buffers accross the device to enforce output buffering rule at compoments boudaries, finally resolved block ram R/W collusion discrepencies,
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2020-12-19 02:45:06 -08:00 |
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Blaise Tine
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5758ef9ebf
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generic_register reset network optimization
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2020-11-29 18:41:36 -08:00 |
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Blaise Tine
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def6a35693
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shared memory optimization
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2020-11-29 15:04:31 -08:00 |
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Blaise Tine
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34b650be94
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fixed shared memory addressing critical path, fixed VX_fp_noncomp output bug
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2020-11-17 00:27:24 -08:00 |
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Blaise Tine
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61add25d96
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minor fix
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2020-11-16 08:23:16 -08:00 |
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Blaise Tine
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5d58bf3d11
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fixed l3cache hang using memory arbiter in afu
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2020-11-15 06:36:32 -08:00 |
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Blaise Tine
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10505caae1
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refactoring all arbiters with buffering for request count > 2, optimized the cache core response module in critical path when running as L2
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2020-11-08 01:31:46 -08:00 |
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Blaise Tine
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4c6a74fa87
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cache refactoring - phase 3 - added dedicated pipeline stage for tag access
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2020-11-04 03:21:30 -08:00 |
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