Blaise Tine
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e4d9fd8a00
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thread mask redesign
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2021-08-05 17:32:58 -07:00 |
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Blaise Tine
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7b8fe11e6a
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unused variables refactoring
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2021-08-05 01:46:26 -07:00 |
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Blaise Tine
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69940feac0
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registering execute units inputs
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2021-08-02 16:08:11 -07:00 |
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Blaise Tine
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c6afc35989
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adding data fence support
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2021-06-28 06:12:18 -07:00 |
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Blaise Tine
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f84c8a0b5d
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instr_sched => ibuffer
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2021-06-27 19:36:43 -07:00 |
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Blaise Tine
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1ea738ed26
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lkg build
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2021-06-25 16:28:10 -07:00 |
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Blaise Tine
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57143f5889
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synthesis optimizations
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2021-06-17 16:43:43 -07:00 |
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Blaise Tine
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47c3234659
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minor update
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2021-06-13 10:58:48 -07:00 |
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Blaise Tine
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09dbeacc14
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minor update
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2021-03-22 23:04:35 -07:00 |
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Blaise Tine
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10a994d11a
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csr minor update
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2021-03-08 03:46:07 -08:00 |
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Blaise Tine
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b441870789
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rename use_imm and use_PC
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2021-03-01 00:38:46 -08:00 |
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Blaise Tine
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3f5fd6d394
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using shiftreg-based skid buffers
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2021-02-28 02:20:09 -08:00 |
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Blaise Tine
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700f9eea19
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moving MUL unit into ALU unit
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2021-02-23 13:49:02 -08:00 |
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Blaise Tine
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6739dc7923
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minor update - registering execute units skid buffers
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2021-02-21 15:11:08 -08:00 |
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Blaise Tine
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8775f63ec4
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lkg build rollout with 16cores optimization on arria10
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2021-01-24 16:49:22 -08:00 |
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Blaise Tine
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98945df5ae
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minor updates
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2021-01-17 12:50:07 -08:00 |
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Blaise Tine
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7c4823e65c
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fixed GPR reset bug, fixed lsu dup loading, fixed riscv-tests
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2021-01-11 23:55:09 -08:00 |
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Blaise Tine
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d44144f72f
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FPU float<->int conversion optimization
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2020-12-29 15:37:45 -08:00 |
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Blaise Tine
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3e9abb978b
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fixed typo
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2020-12-09 13:03:22 -08:00 |
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Blaise Tine
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e0905f8352
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minor update
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2020-12-09 05:34:27 -08:00 |
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Blaise Tine
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13a5370254
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register file refactoring
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2020-12-05 01:40:50 -08:00 |
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Blaise Tine
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fceb561cbd
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synchronous reset network optimization: only reset register when required
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2020-11-11 20:54:54 -08:00 |
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Blaise Tine
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b14007f930
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pipeline optimization: fixed GPR fanout delay to execute units
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2020-11-07 02:01:21 -08:00 |
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Blaise Tine
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49b86c4b2a
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SCOPE update
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2020-09-05 10:52:59 -07:00 |
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Blaise Tine
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af84e01856
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minor update
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2020-08-31 06:17:49 -07:00 |
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Blaise Tine
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fde3f46798
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ibuffer optimization
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2020-08-26 04:44:36 -07:00 |
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Blaise Tine
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b211b29670
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removing pipeline additional registers
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2020-08-25 14:02:35 -07:00 |
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Blaise Tine
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57971f6c76
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decode op_mod optimization
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2020-08-24 02:55:14 -07:00 |
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Blaise Tine
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0b355f228e
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ibuffer addition
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2020-08-22 00:22:04 -07:00 |
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