felsabbagh3
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ca62e57a0d
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L3 and CLUSTRING WORKS
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2020-03-10 02:41:47 -07:00 |
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felsabbagh3
|
469334f23e
|
MULTICORE WITH L2 WORKING
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2020-03-09 01:17:11 -07:00 |
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felsabbagh3
|
3b11e1d72f
|
Cache Working on Mem Copy
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2020-03-08 01:55:15 -08:00 |
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felsabbagh3
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4ed62f1aad
|
Fixed all Cache Warnings
|
2020-03-07 14:34:05 -08:00 |
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felsabbagh3
|
db11bf6990
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Made the cache module configurable for multi-instantiation
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2020-03-07 00:49:40 -08:00 |
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felsabbagh3
|
7222cdd199
|
Added Snoop Invalidate/Writeback Req type
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2020-03-05 01:30:16 -08:00 |
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felsabbagh3
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01ae6ffafe
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Added Core Interface
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2020-03-03 22:14:56 -08:00 |
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wgulian3
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61803741f8
|
Merge branch 'master' into fpga_synthesis
# Conflicts:
# rtl/VX_back_end.v
# rtl/VX_gpr_stage.v
# rtl/VX_writeback.v
# rtl/simulate/test_bench.cpp
# rtl/simulate/test_bench.h
# runtime/mains/dev/Makefile
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2020-02-18 03:34:38 -05:00 |
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felsabbagh3
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be66e51613
|
Added CSRs, some Load unit tests are failing
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2020-02-17 22:22:27 -08:00 |
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wgulian3
|
8d20b52ea2
|
Cleanup imports of VX_define
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2020-02-04 10:57:32 -05:00 |
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Lyons, Ethan Tyler
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c79d08e12c
|
Add files via upload
ICache_In_Place
|
2019-11-08 10:56:44 -05:00 |
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felsabbagh3
|
58a9140f08
|
Before evict_wb_old removal
|
2019-11-07 13:27:38 -05:00 |
|
Savan Roshan
|
e4ee2a9cbd
|
Parameterization working
|
2019-11-07 00:14:46 -05:00 |
|
Savan Roshan
|
3a71a2ebdb
|
Fixed bugs in parameterization
|
2019-11-06 01:09:30 -05:00 |
|
Savan Roshan
|
8468e7d4d9
|
Added prefix DCACHE_
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2019-11-05 08:33:38 -05:00 |
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felsabbagh3
|
bbb2373919
|
Intrinsics: tests for TMC+Control Divergence
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2019-11-01 21:53:37 -04:00 |
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felsabbagh3
|
1e648c5819
|
FIxed first circular issue
|
2019-10-24 10:38:04 -04:00 |
|
felsabbagh3
|
9d8273afe4
|
Finished Cache Integration
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2019-10-22 06:02:08 -04:00 |
|
felsabbagh3
|
b7af8c3f34
|
Integrated Shared Memory
|
2019-10-22 05:03:47 -04:00 |
|
felsabbagh3
|
1bfafca896
|
Cleanup before integration
|
2019-10-22 03:03:17 -04:00 |
|
felsabbagh3
|
b3f464dd89
|
Barriers impl + tested
|
2019-10-22 01:47:39 -04:00 |
|
felsabbagh3
|
31d3d51392
|
WSPAWN imp + tested
|
2019-10-21 23:35:53 -04:00 |
|
felsabbagh3
|
bab1852a99
|
Added Split/Join - not tested
|
2019-10-21 03:03:15 -04:00 |
|
felsabbagh3
|
84f5ccb484
|
Added CSR TID/WID reads
|
2019-10-21 02:10:05 -04:00 |
|
felsabbagh3
|
f7b55427b4
|
Added ISA2 infrastructure with bugs
|
2019-10-18 05:21:32 -04:00 |
|
felsabbagh3
|
559c64cb36
|
Cleanup
|
2019-10-18 02:20:38 -04:00 |
|
felsabbagh3
|
505bbc20c8
|
Removed FWD
|
2019-10-18 02:01:39 -04:00 |
|
felsabbagh3
|
6b729fd2ea
|
minor
|
2019-10-18 01:46:38 -04:00 |
|
felsabbagh3
|
6779d0fade
|
Instruction Multiplex LSU/EXU 1 cycle DONE
|
2019-10-17 22:29:21 -04:00 |
|
felsabbagh3
|
ee83e6d8c8
|
Moved GPR to back-end
|
2019-10-14 19:08:32 -04:00 |
|
felsabbagh3
|
e67310acfb
|
New Warp Scheduler + VCD Enable
|
2019-09-15 00:12:41 -04:00 |
|
felsabbagh3
|
3c3a443bd5
|
New RF with Evaluation
|
2019-09-11 01:04:23 -04:00 |
|
felsabbagh3
|
8d143d7739
|
Quartus + GPR evaluation
|
2019-09-10 20:23:01 -04:00 |
|
felsabbagh3
|
4e8da1811a
|
New GPR structure - Clone or WSPAWN
|
2019-09-09 22:17:20 -04:00 |
|
felsabbagh3
|
1882147370
|
GPR Wrapper Interface Done
|
2019-09-09 14:04:07 -04:00 |
|
felsabbagh3
|
ecf81336db
|
Finished FE and BE high-level
|
2019-09-08 19:28:53 -04:00 |
|
felsabbagh3
|
ad45758a35
|
Before Fetch->FE
|
2019-09-08 18:09:11 -04:00 |
|
felsabbagh3
|
5e6804703f
|
Decode in FE
|
2019-09-08 17:24:51 -04:00 |
|
felsabbagh3
|
ac9b06bf7d
|
Before FE BE abstraction
|
2019-09-08 16:21:37 -04:00 |
|
felsabbagh3
|
fe09aafbb4
|
Interface Checkpoint 2 - Remove Lints
|
2019-09-05 19:32:37 -04:00 |
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