debug tracing refactoring

This commit is contained in:
Blaise Tine
2021-10-17 13:42:16 -07:00
parent af6d9e7a8b
commit bf72800676
26 changed files with 148 additions and 169 deletions

View File

@@ -509,7 +509,7 @@ module VX_bank #(
assign perf_mshr_stalls = mshr_alm_full;
`endif
`ifdef DBG_PRINT_CACHE_BANK
`ifdef DBG_TRACE_CACHE_BANK
wire crsq_fire = crsq_valid && crsq_ready;
wire pipeline_stall = (mshr_valid || mem_rsp_valid || creq_valid)
&& ~(mshr_fire || mem_rsp_fire || creq_fire);

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@@ -119,7 +119,7 @@ module VX_data_access #(
`UNUSED_VAR (stall)
`ifdef DBG_PRINT_CACHE_DATA
`ifdef DBG_TRACE_CACHE_DATA
always @(posedge clk) begin
if (fill && ~stall) begin
dpi_trace("%d: cache%0d:%0d data-fill: addr=%0h, blk_addr=%0d, data=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), line_addr, fill_data);

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@@ -202,7 +202,7 @@ module VX_miss_resrv #(
`UNUSED_VAR (lookup_valid)
`ifdef DBG_PRINT_CACHE_MSHR
`ifdef DBG_TRACE_CACHE_MSHR
always @(posedge clk) begin
if (allocate_fire || fill_valid || dequeue_fire || lookup_replay || lookup_valid || release_valid) begin
if (allocate_fire)

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@@ -271,7 +271,7 @@ module VX_shared_mem #(
end
`endif
`ifdef DBG_PRINT_CACHE_BANK
`ifdef DBG_TRACE_CACHE_BANK
reg is_multi_tag_req;
`IGNORE_UNUSED_BEGIN

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@@ -61,7 +61,7 @@ module VX_tag_access #(
`UNUSED_VAR (stall)
`ifdef DBG_PRINT_CACHE_TAG
`ifdef DBG_TRACE_CACHE_TAG
always @(posedge clk) begin
if (fill && ~stall) begin
dpi_trace("%d: cache%0d:%0d tag-fill: addr=%0h, blk_addr=%0d, tag_id=%0h\n", $time, CACHE_ID, BANK_ID, `LINE_TO_BYTE_ADDR(addr, BANK_ID), line_addr, line_tag);