Readded IPDOM stack + SPLIT/Join tested
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felsabbagh3
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:10120000032544FEEFF0CFB46F00C000032504FDBA
|
:10120000EFF08FA7EFE05FFF2322A4FE032704FD8A
|
||||||
:10121000EFF00FB4130000008320C1030324810307
|
:10121000832744FE63F8E700032544FEEFF0CFB4D4
|
||||||
:101220001301010467800000130101FB2326110450
|
:101220006F00C000032504FDEFF00FB413000000B1
|
||||||
:101230002324810413040105232EA4FA232CB4FAD9
|
:101230008320C1030324810313010104678000009C
|
||||||
:10124000EFF00FC02320A4FE832704FE83A707002E
|
:10124000130101FB23261104232481041304010547
|
||||||
:10125000232EF4FC832704FE83A7470083A70700FF
|
:10125000232EA4FA232CB4FAEFF00FC02320A4FE0F
|
||||||
:10126000232CF4FC832704FE83A78700232AF4FCA5
|
:10126000832704FE83A70700232EF4FC832704FEB4
|
||||||
:10127000832704FE83A747012326F4FE0327C4FE29
|
:1012700083A7470083A70700232CF4FC832704FEE1
|
||||||
:101280008327C4FBB307F7022324F4FE8327C4FE9D
|
:1012800083A78700232AF4FC832704FE83A7470152
|
||||||
:10129000639A0700930710002326F4FE8327C4FBFC
|
:101290002326F4FE0327C4FE8327C4FBB307F7020B
|
||||||
:1012A0002324F4FE832704FE83A7C7002328F4FC2D
|
:1012A0002324F4FE8327C4FE639A070093071000EB
|
||||||
:1012B000232204FE6F00000B032784FB832704FD19
|
:1012B0002326F4FE8327C4FB2324F4FE832704FEA5
|
||||||
:1012C0003307F702832784FEB307F7002326F4FCD5
|
:1012C00083A7C7002328F4FC232204FE6F00000B31
|
||||||
:1012D000032784FE832704FDB337F70093F7F70F46
|
:1012D000032784FB832704FD3307F702832784FE5B
|
||||||
:1012E0002324F4FC832784FC93B71700A303F4FCA6
|
:1012E000B307F7002326F4FC032784FE832704FDBD
|
||||||
:1012F000834774FC138F0700B7170080938F07355F
|
:1012F000B337F70093F7F70F2324F4FC832784FC1C
|
||||||
:101300006B200F007B70FF018327C4FC939727009D
|
:1013000093B71700A303F4FC834774FC138F070003
|
||||||
:101310000327C4FDB307F70083A607008327C4FC97
|
:10131000B7170080938F87366B200F007B70FF011B
|
||||||
:1013200093972700032744FDB307F700032784FDA5
|
:101320008327C4FC939727000327C4FDB307F70066
|
||||||
:101330003387E60023A0E700832784FE9387170006
|
:1013300083A607008327C4FC93972700032744FD57
|
||||||
:101340002324F4FEB7170080138E473567000E0084
|
:10134000B307F700032784FD3387E60023A0E700F7
|
||||||
:10135000130000006B300000832744FE93871700C2
|
:10135000832784FE938717002324F4FEB7170080A9
|
||||||
:101360002322F4FE832744FE0327C4FEE3E6E7F4CA
|
:10136000138EC73667000E00130000006B300000BC
|
||||||
:10137000130000008320C10403248104130101052C
|
:10137000832744FE938717002322F4FE832744FE2D
|
||||||
:1013800067800000130101FC232E1102232C81022F
|
:101380000327C4FEE3E6E7F4130000008320C10452
|
||||||
:1013900013040104232EA4FC232CB4FC232AC4FC34
|
:10139000032481041301010567800000130101FC8F
|
||||||
:1013A0002328D4FC2326E4FCB76702810327C4FD6D
|
:1013A000232E1102232C810213040104232EA4FCFA
|
||||||
:1013B00023A2E71EB76702819387471E032784FD98
|
:1013B000232CB4FC232AC4FC2328D4FC2326E4FCDD
|
||||||
:1013C00023A2E700B76702819387471E032744FDE6
|
:1013C000B76702810327C4FD23A2E71EB767028126
|
||||||
:1013D00023A4E700B76702819387471E0327C4FC55
|
:1013D0009387471E032784FD23A2E700B767028196
|
||||||
:1013E00023A6E700B76702819387471E032704FD02
|
:1013E0009387471E032744FD23A4E700B7670281C4
|
||||||
:1013F00023A8E700EFE05FDF2324A4FE0327C4FC5B
|
:1013F0009387471E0327C4FC23A6E700B767028133
|
||||||
:10140000832784FEB357F7022326F4FE0327C4FC88
|
:101400009387471E032704FD23A8E700EFE05FDF73
|
||||||
:10141000832784FEB377F702638807008327C4FE1F
|
:101410002324A4FE0327C4FC832784FEB357F702CA
|
||||||
:10142000938717002326F4FEB76702819387471E30
|
:101420002326F4FE0327C4FC832784FEB377F70248
|
||||||
:101430000327C4FE23AAE7000327C4FC832784FEF6
|
:10143000638807008327C4FE938717002326F4FEE2
|
||||||
:101440006362F702B76702819386471EB717008071
|
:10144000B76702819387471E0327C4FE23AAE700DC
|
||||||
:101450001386C74B832584FE032504FDEFF04F80E0
|
:101450000327C4FC832784FE6362F702B767028117
|
||||||
:101460006F000002B76702819386471EB71700809E
|
:101460009386471EB71700801386474D832584FE59
|
||||||
:101470001386C74B8325C4FC032504FDEFE05FFE04
|
:10147000032504FDEFF04F806F000002B767028183
|
||||||
:10148000EFE01FD62322A4FE032704FD832744FE9A
|
:101480009386471EB71700801386474D8325C4FCFB
|
||||||
:1014900063F8E700032544FEEFF08F8B6F00C00078
|
:10149000032504FDEFE05FFEEFE01FD62322A4FE4C
|
||||||
:1014A000032504FDEFF0CF8A130000008320C10361
|
:1014A000032704FD832744FE63F8E700032544FE79
|
||||||
:1014B000032481031301010467800000130101FB71
|
:1014B000EFF08F8B6F00C000032504FDEFF0CF8AA3
|
||||||
:1014C000232611042324810413040105232EA4FAE6
|
:1014C000130000008320C1030324810313010104DE
|
||||||
:1014D000232CB4FAEFF0CF962320A4FE832704FE3A
|
:1014D00067800000130101FB2326110423248104EB
|
||||||
:1014E00083A70700232EF4FC832704FE83A747006D
|
:1014E00013040105232EA4FA232CB4FAEFF0CF96AF
|
||||||
:1014F00083A70700232CF4FC832704FE83A787001F
|
:1014F0002320A4FE832704FE83A70700232EF4FCE9
|
||||||
:10150000232AF4FC832704FE83A747012326F4FE45
|
:10150000832704FE83A7470083A70700232CF4FC4E
|
||||||
:101510000327C4FE8327C4FBB307F7022324F4FE8A
|
:10151000832704FE83A78700232AF4FC832704FE85
|
||||||
:101520008327C4FE639A0700930710002326F4FE66
|
:1015200083A747012326F4FE0327C4FE8327C4FBB9
|
||||||
:101530008327C4FB2324F4FE832704FE83A7C7006C
|
:10153000B307F7022324F4FE8327C4FE639A07004F
|
||||||
:101540002328F4FC232204FE6F00000B032784FBF6
|
:10154000930710002326F4FE8327C4FB2324F4FE14
|
||||||
:10155000832704FD3307F702832784FEB307F700D0
|
:10155000832704FE83A7C7002328F4FC232204FE6C
|
||||||
:101560002326F4FC032784FE832704FDB337F7000A
|
:101560006F00000B032784FB832704FD3307F7027A
|
||||||
:1015700093F7F70F2324F4FC832784FC93B7170019
|
:10157000832784FEB307F7002326F4FC032784FEA9
|
||||||
:10158000A303F4FC834774FC138F0700B717008094
|
:10158000832704FDB337F70093F7F70F2324F4FC08
|
||||||
:10159000938F475E6B200F007B70FF018327C4FC95
|
:10159000832784FC93B71700A303F4FC834774FCF0
|
||||||
:1015A000939727000327C4FDB307F70083A607001E
|
:1015A000138F0700B7170080938FC75F6B200F0062
|
||||||
:1015B0008327C4FC93972700032744FDB307F70054
|
:1015B0007B70FF018327C4FC939727000327C4FD9A
|
||||||
:1015C000032784FD3387E60223A0E700832784FEF8
|
:1015C000B307F70083A607008327C4FC939727007F
|
||||||
:1015D000938717002324F4FEB7170080138E875ECD
|
:1015D000032744FDB307F700032784FD3387E602A2
|
||||||
:1015E00067000E00130000006B300000832744FEEC
|
:1015E00023A0E700832784FE938717002324F4FEBB
|
||||||
:1015F000938717002322F4FE832744FE0327C4FEAB
|
:1015F000B7170080138E076067000E00130000000D
|
||||||
:10160000E3E6E7F4130000008320C104032481040F
|
:101600006B300000832744FE938717002322F4FEEB
|
||||||
:101610001301010567800000130101FD23268102EB
|
:10161000832744FE0327C4FEE3E6E7F4130000003B
|
||||||
:1016200013040103232EA4FC232604FE6F000001F3
|
:101620008320C104032481041301010567800000A5
|
||||||
:101630008327C4FE938717002326F4FE0327C4FEE6
|
:10163000130101FD2326810213040103232EA4FCC0
|
||||||
:101640008327C4FDE346F7FE130000000324C10214
|
:10164000232604FE6F0000018327C4FE9387170042
|
||||||
:101650001301010367800000130101FD232611021D
|
:101650002326F4FE0327C4FE8327C4FDE346F7FEDA
|
||||||
:101660002324810213040103232EA4FC232CB4FCA5
|
:10166000130000000324C10213010103678000007E
|
||||||
:10167000B76702811387C71F8327C4FDB307F7002D
|
:10167000130101FD23261102232481021304010317
|
||||||
:10168000130710002380E7008327C4FD6390070C35
|
:10168000232EA4FC232CB4FCB76702811387C71F49
|
||||||
:10169000A30104FE232604FE6F00800A232604FE15
|
:101690008327C4FDB307F700130710002380E7007A
|
||||||
:1016A000232404FE6F004003B76702811387C71F1E
|
:1016A0008327C4FD6390070CA30104FE232604FED8
|
||||||
:1016B000832784FEB307F70083C70700638807000A
|
:1016B0006F00800A232604FE232404FE6F004003EB
|
||||||
:1016C0008327C4FE938717002326F4FE832784FE16
|
:1016C000B76702811387C71F832784FEB307F7001C
|
||||||
:1016D000938717002324F4FE032784FE832784FDC9
|
:1016D00083C70700638807008327C4FE938717002A
|
||||||
:1016E000E344F7FC0327C4FE832784FD631AF70451
|
:1016E0002326F4FE832784FE938717002324F4FE29
|
||||||
:1016F000232204FE6F000004B76702811387C71F0F
|
:1016F000032784FE832784FDE344F7FC0327C4FE0D
|
||||||
:10170000832744FEB307F70023800700B7970281C1
|
:10170000832784FD631AF704232204FE6F0000047C
|
||||||
:10171000130710002382E72C13056004EFF0DFEFBE
|
:10171000B76702811387C71F832744FEB307F7000B
|
||||||
:10172000B79702812382072C832744FE93871700F3
|
:1017200023800700B7970281130710002382E72C5C
|
||||||
:101730002322F4FE032744FE832784FDE34EF7FAB9
|
:1017300013056004EFF0DFEFB79702812382072CD7
|
||||||
:10174000834734FEE39C07F46F004002130000005F
|
:10174000832744FE938717002322F4FE032744FED9
|
||||||
:10175000B797028183C7472C93C7170093F7F70FFA
|
:10175000832784FDE34EF7FA834734FEE39C07F4C6
|
||||||
:10176000E39807FE13054006EFF01FEB130000009F
|
:101760006F00400213000000B797028183C7472C27
|
||||||
:101770008320C1020324810213010103678000005A
|
:1017700093C7170093F7F70FE39807FE130540068A
|
||||||
:10178000130101FF232681001304010193070000C8
|
:10178000EFF01FEB130000008320C102032481024D
|
||||||
:101790001308000013850700930508000324C10007
|
:101790001301010367800000130101FF232681006C
|
||||||
:1017A0001301010167800000130101FE232E810057
|
:1017A00013040101930700001308000013850700CC
|
||||||
:1017B00013040102232604FE6F008004B767028130
|
:1017B000930508000324C1001301010167800000A4
|
||||||
:1017C0000327C4FE131727009387C721B307F70029
|
:1017C000130101FE232E810013040102232604FECF
|
||||||
:1017D0001307300023A0E700B77702810327C4FE78
|
:1017D0006F008004B76702810327C4FE1317270038
|
||||||
:1017E000131727009387C721B307F70013072000BB
|
:1017E0009387C721B307F7001307300023A0E70052
|
||||||
:1017F00023A0E7008327C4FE938717002326F4FE67
|
:1017F000B77702810327C4FE131727009387C721F9
|
||||||
:101800000327C4FE9307F00FE3DAE7FA13000000A2
|
:10180000B307F7001307200023A0E7008327C4FED7
|
||||||
:101810000324C1011301010267800000130101FDCF
|
:10181000938717002326F4FE0327C4FE9307F00FD7
|
||||||
:10182000232611022324810213040103232EA4FC86
|
:10182000E3DAE7FA130000000324C1011301010207
|
||||||
:10183000B707008113858711EFE0DFF8232604FE48
|
:1018300067800000130101FD232611022324810289
|
||||||
:101840006F0080058327C4FE638E07008327C4FED4
|
:1018400013040103232EA4FCB7070081138587111D
|
||||||
:1018500093F7F70063980700B70700811385C71354
|
:10185000EFE0DFF8232604FE6F0080058327C4FE37
|
||||||
:10186000EFE05FF68327C4FE939727000327C4FDAC
|
:10186000638E07008327C4FE93F7F7006398070091
|
||||||
:10187000B307F70083A7070013850700EFE05FF8C1
|
:10187000B70700811385C713EFE05FF68327C4FE27
|
||||||
:10188000B707008113850714EFE0DFF38327C4FE59
|
:10188000939727000327C4FDB307F70083A707003A
|
||||||
:10189000938717002326F4FE0327C4FE9307F00F57
|
:1018900013850700EFE05FF8B70700811385071491
|
||||||
:1018A000E3D2E7FAB707008113854714EFE09FF111
|
:1018A000EFE0DFF38327C4FE938717002326F4FEBF
|
||||||
:1018B000130000008320C1020324810213010103ED
|
:1018B0000327C4FE9307F00FE3D2E7FAB7070081CE
|
||||||
:1018C00067800000130101FF2326110023248100FB
|
:1018C00013854714EFE09FF1130000008320C1024D
|
||||||
:1018D00013040101EFF05FEDB76702811385C721A3
|
:1018D000032481021301010367800000130101FF4B
|
||||||
:1018E000EFF0DFF393070000138507008320C100AA
|
:1018E000232611002324810013040101EFF05FED92
|
||||||
:0C18F00003248100130101016780000047
|
:1018F000B76702811385C721EFF0DFF3930700007C
|
||||||
|
:10190000138507008320C100032481001301010116
|
||||||
|
:0419100067800000EC
|
||||||
:02000004810079
|
:02000004810079
|
||||||
:10000000300000003100000032000000330000002A
|
:10000000300000003100000032000000330000002A
|
||||||
:10001000340000003500000036000000370000000A
|
:10001000340000003500000036000000370000000A
|
||||||
|
|||||||
@@ -9,7 +9,16 @@ _start:
|
|||||||
li a0, 4
|
li a0, 4
|
||||||
.word 0x0005006b # tmc a0
|
.word 0x0005006b # tmc a0
|
||||||
csrr a1, 0x20 # read thread IDs
|
csrr a1, 0x20 # read thread IDs
|
||||||
csrr a2, 0x21 # read warp IDs
|
# csrr a2, 0x21 # read warp IDs
|
||||||
|
slti a0, a1, 2
|
||||||
|
.word 0x0005206b # split a0
|
||||||
|
beq a0, zero, ELSE
|
||||||
|
li a2, 5
|
||||||
|
j DONE
|
||||||
|
ELSE:
|
||||||
|
li a2, 7
|
||||||
|
DONE:
|
||||||
|
.word 0x0000306b #join
|
||||||
ecall
|
ecall
|
||||||
# li a0, 8 # Num Warps
|
# li a0, 8 # Num Warps
|
||||||
# csrw 0x20, a0 # Setting the number of available warps
|
# csrw 0x20, a0 # Setting the number of available warps
|
||||||
|
|||||||
@@ -8,8 +8,9 @@ EXE=--exe ./simulate/test_bench.cpp
|
|||||||
|
|
||||||
COMP=--compiler gcc
|
COMP=--compiler gcc
|
||||||
|
|
||||||
WNO=-Wno-fatal -Wno-UNOPTFLAT -Wno-UNDRIVEN -Wno-UNSIGNED -Wno-lint --Wno-PINMISSING -Wno-STMTDLY
|
WNO=-Wno-UNOPTFLAT -Wno-UNDRIVEN --Wno-PINMISSING -Wno-STMTDLY -Wno-WIDTH
|
||||||
|
|
||||||
|
LIGHTW=-Wno-UNOPTFLAT --Wno-PINMISSING -Wno-WIDTH -Wno-STMTDLY
|
||||||
# LIB=-LDFLAGS '-L/usr/local/systemc/'
|
# LIB=-LDFLAGS '-L/usr/local/systemc/'
|
||||||
LIB=
|
LIB=
|
||||||
|
|
||||||
@@ -23,7 +24,7 @@ MAKECPP=(cd obj_dir && make -j -f VVortex.mk)
|
|||||||
# -LDFLAGS '-lsystemc'
|
# -LDFLAGS '-lsystemc'
|
||||||
VERILATOR:
|
VERILATOR:
|
||||||
echo "#define VCD_OFF" > simulate/tb_debug.h
|
echo "#define VCD_OFF" > simulate/tb_debug.h
|
||||||
verilator $(COMP) -cc $(FILE) $(INCLUDE) $(EXE) $(LIB) $(CF)
|
verilator $(COMP) -cc $(FILE) $(INCLUDE) $(EXE) $(LIB) $(CF) $(LIGHTW)
|
||||||
|
|
||||||
VERILATORnoWarnings:
|
VERILATORnoWarnings:
|
||||||
echo "#define VCD_OFF" > simulate/tb_debug.h
|
echo "#define VCD_OFF" > simulate/tb_debug.h
|
||||||
|
|||||||
@@ -186,23 +186,23 @@ module VX_decode(
|
|||||||
case(curr_opcode)
|
case(curr_opcode)
|
||||||
`JAL_INST:
|
`JAL_INST:
|
||||||
begin
|
begin
|
||||||
temp_jal = 1'b1 && in_valid[0];
|
temp_jal = 1'b1 && (|in_valid);
|
||||||
temp_jal_offset = jal_1_offset;
|
temp_jal_offset = jal_1_offset;
|
||||||
end
|
end
|
||||||
`JALR_INST:
|
`JALR_INST:
|
||||||
begin
|
begin
|
||||||
temp_jal = 1'b1 && in_valid[0];
|
temp_jal = 1'b1 && (|in_valid);
|
||||||
temp_jal_offset = jal_2_offset;
|
temp_jal_offset = jal_2_offset;
|
||||||
end
|
end
|
||||||
`SYS_INST:
|
`SYS_INST:
|
||||||
begin
|
begin
|
||||||
// $display("SYS EBREAK %h", (jal_sys_jal && in_valid[0]) );
|
// $display("SYS EBREAK %h", (jal_sys_jal && (|in_valid)) );
|
||||||
temp_jal = jal_sys_jal && in_valid[0];
|
temp_jal = jal_sys_jal && (|in_valid);
|
||||||
temp_jal_offset = jal_sys_off;
|
temp_jal_offset = jal_sys_off;
|
||||||
end
|
end
|
||||||
default:
|
default:
|
||||||
begin
|
begin
|
||||||
temp_jal = 1'b0 && in_valid[0];
|
temp_jal = 1'b0 && (|in_valid);
|
||||||
temp_jal_offset = 32'hdeadbeef;
|
temp_jal_offset = 32'hdeadbeef;
|
||||||
end
|
end
|
||||||
endcase
|
endcase
|
||||||
@@ -216,7 +216,7 @@ module VX_decode(
|
|||||||
|
|
||||||
|
|
||||||
// assign is_ebreak = is_e_inst;
|
// assign is_ebreak = is_e_inst;
|
||||||
wire ebreak = (curr_opcode == `SYS_INST) && (jal_sys_jal && in_valid[0]);
|
wire ebreak = (curr_opcode == `SYS_INST) && (jal_sys_jal && (|in_valid));
|
||||||
assign VX_frE_to_bckE_req.ebreak = ebreak;
|
assign VX_frE_to_bckE_req.ebreak = ebreak;
|
||||||
assign out_ebreak = ebreak;
|
assign out_ebreak = ebreak;
|
||||||
|
|
||||||
@@ -257,7 +257,7 @@ module VX_decode(
|
|||||||
`B_INST:
|
`B_INST:
|
||||||
begin
|
begin
|
||||||
// $display("BRANCH IN DECODE");
|
// $display("BRANCH IN DECODE");
|
||||||
temp_branch_stall = 1'b1 && in_valid[0];
|
temp_branch_stall = 1'b1 && (|in_valid);
|
||||||
case(func3)
|
case(func3)
|
||||||
3'h0: temp_branch_type = `BEQ;
|
3'h0: temp_branch_type = `BEQ;
|
||||||
3'h1: temp_branch_type = `BNE;
|
3'h1: temp_branch_type = `BNE;
|
||||||
@@ -272,17 +272,17 @@ module VX_decode(
|
|||||||
`JAL_INST:
|
`JAL_INST:
|
||||||
begin
|
begin
|
||||||
temp_branch_type = `NO_BRANCH;
|
temp_branch_type = `NO_BRANCH;
|
||||||
temp_branch_stall = 1'b1 && in_valid[0];
|
temp_branch_stall = 1'b1 && (|in_valid);
|
||||||
end
|
end
|
||||||
`JALR_INST:
|
`JALR_INST:
|
||||||
begin
|
begin
|
||||||
temp_branch_type = `NO_BRANCH;
|
temp_branch_type = `NO_BRANCH;
|
||||||
temp_branch_stall = 1'b1 && in_valid[0];
|
temp_branch_stall = 1'b1 && (|in_valid);
|
||||||
end
|
end
|
||||||
default:
|
default:
|
||||||
begin
|
begin
|
||||||
temp_branch_type = `NO_BRANCH;
|
temp_branch_type = `NO_BRANCH;
|
||||||
temp_branch_stall = 1'b0 && in_valid[0];
|
temp_branch_stall = 1'b0 && (|in_valid);
|
||||||
end
|
end
|
||||||
endcase
|
endcase
|
||||||
end
|
end
|
||||||
|
|||||||
@@ -58,16 +58,26 @@ module VX_execute_unit (
|
|||||||
endgenerate
|
endgenerate
|
||||||
|
|
||||||
|
|
||||||
|
wire [`NW_M1:0] branch_use_index;
|
||||||
|
wire branch_found_valid;
|
||||||
|
VX_priority_encoder choose_alu_result(
|
||||||
|
.valids(VX_exec_unit_req.valid),
|
||||||
|
.index (branch_use_index),
|
||||||
|
.found (branch_found_valid)
|
||||||
|
);
|
||||||
|
|
||||||
|
wire[31:0] branch_use_alu_result = alu_result[branch_use_index];
|
||||||
|
|
||||||
reg temp_branch_dir;
|
reg temp_branch_dir;
|
||||||
always @(*)
|
always @(*)
|
||||||
begin
|
begin
|
||||||
case(VX_exec_unit_req.branch_type)
|
case(VX_exec_unit_req.branch_type)
|
||||||
`BEQ: temp_branch_dir = (alu_result[0] == 0) ? `TAKEN : `NOT_TAKEN;
|
`BEQ: temp_branch_dir = (branch_use_alu_result == 0) ? `TAKEN : `NOT_TAKEN;
|
||||||
`BNE: temp_branch_dir = (alu_result[0] == 0) ? `NOT_TAKEN : `TAKEN;
|
`BNE: temp_branch_dir = (branch_use_alu_result == 0) ? `NOT_TAKEN : `TAKEN;
|
||||||
`BLT: temp_branch_dir = (alu_result[0][31] == 0) ? `NOT_TAKEN : `TAKEN;
|
`BLT: temp_branch_dir = (branch_use_alu_result[31] == 0) ? `NOT_TAKEN : `TAKEN;
|
||||||
`BGT: temp_branch_dir = (alu_result[0][31] == 0) ? `TAKEN : `NOT_TAKEN;
|
`BGT: temp_branch_dir = (branch_use_alu_result[31] == 0) ? `TAKEN : `NOT_TAKEN;
|
||||||
`BLTU: temp_branch_dir = (alu_result[0][31] == 0) ? `NOT_TAKEN : `TAKEN;
|
`BLTU: temp_branch_dir = (branch_use_alu_result[31] == 0) ? `NOT_TAKEN : `TAKEN;
|
||||||
`BGTU: temp_branch_dir = (alu_result[0][31] == 0) ? `TAKEN : `NOT_TAKEN;
|
`BGTU: temp_branch_dir = (branch_use_alu_result[31] == 0) ? `TAKEN : `NOT_TAKEN;
|
||||||
`NO_BRANCH: temp_branch_dir = `NOT_TAKEN;
|
`NO_BRANCH: temp_branch_dir = `NOT_TAKEN;
|
||||||
default: temp_branch_dir = `NOT_TAKEN;
|
default: temp_branch_dir = `NOT_TAKEN;
|
||||||
endcase // in_branch_type
|
endcase // in_branch_type
|
||||||
|
|||||||
@@ -22,13 +22,12 @@ module VX_generic_stack
|
|||||||
if (reset) begin
|
if (reset) begin
|
||||||
ptr <= 0;
|
ptr <= 0;
|
||||||
for (i = 0; i < (1 << DEPTH); i=i+1) stack[i] <= 0;
|
for (i = 0; i < (1 << DEPTH); i=i+1) stack[i] <= 0;
|
||||||
end else if (push)
|
|
||||||
ptr <= ptr + 2;
|
|
||||||
else if (pop) begin
|
|
||||||
ptr <= ptr - 1;
|
|
||||||
end else if (push) begin
|
end else if (push) begin
|
||||||
stack[ptr] <= q1;
|
stack[ptr] <= q1;
|
||||||
stack[ptr+1] <= q2;
|
stack[ptr+1] <= q2;
|
||||||
|
ptr <= ptr + 2;
|
||||||
|
end else if (pop) begin
|
||||||
|
ptr <= ptr - 1;
|
||||||
end
|
end
|
||||||
|
|
||||||
end
|
end
|
||||||
|
|||||||
@@ -7,6 +7,9 @@ module VX_gpgpu_inst (
|
|||||||
);
|
);
|
||||||
|
|
||||||
|
|
||||||
|
wire[`NT_M1:0] curr_valids = VX_gpu_inst_req.valid;
|
||||||
|
wire is_split = (VX_gpu_inst_req.is_split);
|
||||||
|
|
||||||
wire[`NT_M1:0] tmc_new_mask;
|
wire[`NT_M1:0] tmc_new_mask;
|
||||||
genvar curr_t;
|
genvar curr_t;
|
||||||
for (curr_t = 0; curr_t < `NT; curr_t=curr_t+1)
|
for (curr_t = 0; curr_t < `NT; curr_t=curr_t+1)
|
||||||
@@ -14,7 +17,7 @@ module VX_gpgpu_inst (
|
|||||||
assign tmc_new_mask[curr_t] = curr_t < VX_gpu_inst_req.a_reg_data[0];
|
assign tmc_new_mask[curr_t] = curr_t < VX_gpu_inst_req.a_reg_data[0];
|
||||||
end
|
end
|
||||||
|
|
||||||
wire valid_inst = (|VX_gpu_inst_req.valid);
|
wire valid_inst = (|curr_valids);
|
||||||
|
|
||||||
assign VX_warp_ctl.warp_num = VX_gpu_inst_req.warp_num;
|
assign VX_warp_ctl.warp_num = VX_gpu_inst_req.warp_num;
|
||||||
assign VX_warp_ctl.change_mask = (VX_gpu_inst_req.is_tmc || VX_gpu_inst_req.is_split) && valid_inst;
|
assign VX_warp_ctl.change_mask = (VX_gpu_inst_req.is_tmc || VX_gpu_inst_req.is_split) && valid_inst;
|
||||||
@@ -34,20 +37,19 @@ module VX_gpgpu_inst (
|
|||||||
for (curr_s_t = 0; curr_s_t < `NT; curr_s_t=curr_s_t+1) begin
|
for (curr_s_t = 0; curr_s_t < `NT; curr_s_t=curr_s_t+1) begin
|
||||||
wire curr_bool = (VX_gpu_inst_req.a_reg_data[curr_s_t] == 32'b1);
|
wire curr_bool = (VX_gpu_inst_req.a_reg_data[curr_s_t] == 32'b1);
|
||||||
|
|
||||||
assign split_new_use_mask[curr_s_t] = VX_gpu_inst_req.valid[curr_s_t] & (curr_bool);
|
assign split_new_use_mask[curr_s_t] = curr_valids[curr_s_t] & (curr_bool);
|
||||||
assign split_new_later_mask[curr_s_t] = VX_gpu_inst_req.valid[curr_s_t] & (!curr_bool);
|
assign split_new_later_mask[curr_s_t] = curr_valids[curr_s_t] & (!curr_bool);
|
||||||
end
|
end
|
||||||
|
|
||||||
reg[$clog2(`NT)-1:0] num_valids;
|
|
||||||
integer z;
|
wire[`NW_M1:0] num_valids;
|
||||||
always @(*) begin
|
VX_one_counter one_counter(
|
||||||
num_valids = 0;
|
.valids (curr_valids),
|
||||||
for (z = 0; z < `NT; z=z+1) begin
|
.ones_found(num_valids)
|
||||||
if (VX_gpu_inst_req.valid[z]) num_valids = num_valids + 1;
|
);
|
||||||
end
|
|
||||||
end
|
|
||||||
|
|
||||||
assign VX_warp_ctl.is_split = (VX_gpu_inst_req.is_split) && (num_valids > 1);
|
assign VX_warp_ctl.is_split = is_split && (num_valids > 1);
|
||||||
assign VX_warp_ctl.split_new_mask = split_new_use_mask;
|
assign VX_warp_ctl.split_new_mask = split_new_use_mask;
|
||||||
assign VX_warp_ctl.split_later_mask = split_new_later_mask;
|
assign VX_warp_ctl.split_later_mask = split_new_later_mask;
|
||||||
assign VX_warp_ctl.split_save_pc = VX_gpu_inst_req.pc_next;
|
assign VX_warp_ctl.split_save_pc = VX_gpu_inst_req.pc_next;
|
||||||
|
|||||||
196
rtl/VX_gpr.v
196
rtl/VX_gpr.v
@@ -15,112 +15,112 @@ module VX_gpr (
|
|||||||
|
|
||||||
assign write_enable = valid_write_request && ((VX_writeback_inter.wb != 0) && (VX_writeback_inter.rd != 5'h0));
|
assign write_enable = valid_write_request && ((VX_writeback_inter.wb != 0) && (VX_writeback_inter.rd != 5'h0));
|
||||||
|
|
||||||
// byte_enabled_simple_dual_port_ram first_ram(
|
byte_enabled_simple_dual_port_ram first_ram(
|
||||||
// .we (write_enable),
|
.we (write_enable),
|
||||||
// .clk (clk),
|
.clk (clk),
|
||||||
// .waddr (VX_writeback_inter.rd),
|
.waddr (VX_writeback_inter.rd),
|
||||||
// .raddr1(VX_gpr_read.rs1),
|
.raddr1(VX_gpr_read.rs1),
|
||||||
// .raddr2(VX_gpr_read.rs2),
|
.raddr2(VX_gpr_read.rs2),
|
||||||
// .be (VX_writeback_inter.wb_valid),
|
.be (VX_writeback_inter.wb_valid),
|
||||||
// .wdata (VX_writeback_inter.write_data),
|
.wdata (VX_writeback_inter.write_data),
|
||||||
// .q1 (out_a_reg_data),
|
.q1 (out_a_reg_data),
|
||||||
// .q2 (out_b_reg_data)
|
.q2 (out_b_reg_data)
|
||||||
// );
|
);
|
||||||
|
|
||||||
|
|
||||||
wire[`NT_M1:0][31:0] write_bit_mask;
|
// wire[`NT_M1:0][31:0] write_bit_mask;
|
||||||
|
|
||||||
genvar curr_t;
|
// genvar curr_t;
|
||||||
for (curr_t = 0; curr_t < `NT; curr_t=curr_t+1) begin
|
// for (curr_t = 0; curr_t < `NT; curr_t=curr_t+1) begin
|
||||||
wire local_write = write_enable & VX_writeback_inter.wb_valid[curr_t];
|
// wire local_write = write_enable & VX_writeback_inter.wb_valid[curr_t];
|
||||||
assign write_bit_mask[curr_t] = {32{~local_write}};
|
// assign write_bit_mask[curr_t] = {32{~local_write}};
|
||||||
end
|
// end
|
||||||
|
|
||||||
wire going_to_write = write_enable & (|VX_writeback_inter.wb_valid);
|
// wire going_to_write = write_enable & (|VX_writeback_inter.wb_valid);
|
||||||
|
|
||||||
|
|
||||||
wire cenb = !going_to_write;
|
// wire cenb = !going_to_write;
|
||||||
|
|
||||||
wire cena_1 = (VX_gpr_read.rs1 == 0);
|
// wire cena_1 = (VX_gpr_read.rs1 == 0);
|
||||||
wire cena_2 = (VX_gpr_read.rs2 == 0);
|
// wire cena_2 = (VX_gpr_read.rs2 == 0);
|
||||||
|
|
||||||
// wire[127:0] write_bit_mask = {{32{~(VX_writeback_inter.wb_valid[3])}}, {32{~(VX_writeback_inter.wb_valid[2])}}, {32{~(VX_writeback_inter.wb_valid[1])}}, {32{~(VX_writeback_inter.wb_valid[0])}}};
|
// // wire[127:0] write_bit_mask = {{32{~(VX_writeback_inter.wb_valid[3])}}, {32{~(VX_writeback_inter.wb_valid[2])}}, {32{~(VX_writeback_inter.wb_valid[1])}}, {32{~(VX_writeback_inter.wb_valid[0])}}};
|
||||||
/* verilator lint_off PINCONNECTEMPTY */
|
// /* verilator lint_off PINCONNECTEMPTY */
|
||||||
rf2_32x128_wm1 first_ram (
|
// rf2_32x128_wm1 first_ram (
|
||||||
.CENYA(),
|
// .CENYA(),
|
||||||
.AYA(),
|
// .AYA(),
|
||||||
.CENYB(),
|
// .CENYB(),
|
||||||
.WENYB(),
|
// .WENYB(),
|
||||||
.AYB(),
|
// .AYB(),
|
||||||
.QA(out_a_reg_data),
|
// .QA(out_a_reg_data),
|
||||||
.SOA(),
|
// .SOA(),
|
||||||
.SOB(),
|
// .SOB(),
|
||||||
.CLKA(clk),
|
// .CLKA(clk),
|
||||||
.CENA(cena_1),
|
// .CENA(cena_1),
|
||||||
.AA(VX_gpr_read.rs1),
|
// .AA(VX_gpr_read.rs1),
|
||||||
.CLKB(clk),
|
// .CLKB(clk),
|
||||||
.CENB(cenb),
|
// .CENB(cenb),
|
||||||
.WENB(write_bit_mask),
|
// .WENB(write_bit_mask),
|
||||||
.AB(VX_writeback_inter.rd),
|
// .AB(VX_writeback_inter.rd),
|
||||||
.DB(VX_writeback_inter.write_data),
|
// .DB(VX_writeback_inter.write_data),
|
||||||
.EMAA(3'b011),
|
// .EMAA(3'b011),
|
||||||
.EMASA(1'b0),
|
// .EMASA(1'b0),
|
||||||
.EMAB(3'b011),
|
// .EMAB(3'b011),
|
||||||
.TENA(1'b1),
|
// .TENA(1'b1),
|
||||||
.TCENA(1'b0),
|
// .TCENA(1'b0),
|
||||||
.TAA(5'b0),
|
// .TAA(5'b0),
|
||||||
.TENB(1'b1),
|
// .TENB(1'b1),
|
||||||
.TCENB(1'b0),
|
// .TCENB(1'b0),
|
||||||
.TWENB(128'b0),
|
// .TWENB(128'b0),
|
||||||
.TAB(5'b0),
|
// .TAB(5'b0),
|
||||||
.TDB(128'b0),
|
// .TDB(128'b0),
|
||||||
.RET1N(1'b1),
|
// .RET1N(1'b1),
|
||||||
.SIA(2'b0),
|
// .SIA(2'b0),
|
||||||
.SEA(1'b0),
|
// .SEA(1'b0),
|
||||||
.DFTRAMBYP(1'b0),
|
// .DFTRAMBYP(1'b0),
|
||||||
.SIB(2'b0),
|
// .SIB(2'b0),
|
||||||
.SEB(1'b0),
|
// .SEB(1'b0),
|
||||||
.COLLDISN(1'b1)
|
// .COLLDISN(1'b1)
|
||||||
);
|
// );
|
||||||
/* verilator lint_on PINCONNECTEMPTY */
|
// /* verilator lint_on PINCONNECTEMPTY */
|
||||||
|
|
||||||
/* verilator lint_off PINCONNECTEMPTY */
|
// /* verilator lint_off PINCONNECTEMPTY */
|
||||||
rf2_32x128_wm1 second_ram (
|
// rf2_32x128_wm1 second_ram (
|
||||||
.CENYA(),
|
// .CENYA(),
|
||||||
.AYA(),
|
// .AYA(),
|
||||||
.CENYB(),
|
// .CENYB(),
|
||||||
.WENYB(),
|
// .WENYB(),
|
||||||
.AYB(),
|
// .AYB(),
|
||||||
.QA(out_b_reg_data),
|
// .QA(out_b_reg_data),
|
||||||
.SOA(),
|
// .SOA(),
|
||||||
.SOB(),
|
// .SOB(),
|
||||||
.CLKA(clk),
|
// .CLKA(clk),
|
||||||
.CENA(cena_2),
|
// .CENA(cena_2),
|
||||||
.AA(VX_gpr_read.rs2),
|
// .AA(VX_gpr_read.rs2),
|
||||||
.CLKB(clk),
|
// .CLKB(clk),
|
||||||
.CENB(cenb),
|
// .CENB(cenb),
|
||||||
.WENB(write_bit_mask),
|
// .WENB(write_bit_mask),
|
||||||
.AB(VX_writeback_inter.rd),
|
// .AB(VX_writeback_inter.rd),
|
||||||
.DB(VX_writeback_inter.write_data),
|
// .DB(VX_writeback_inter.write_data),
|
||||||
.EMAA(3'b011),
|
// .EMAA(3'b011),
|
||||||
.EMASA(1'b0),
|
// .EMASA(1'b0),
|
||||||
.EMAB(3'b011),
|
// .EMAB(3'b011),
|
||||||
.TENA(1'b1),
|
// .TENA(1'b1),
|
||||||
.TCENA(1'b0),
|
// .TCENA(1'b0),
|
||||||
.TAA(5'b0),
|
// .TAA(5'b0),
|
||||||
.TENB(1'b1),
|
// .TENB(1'b1),
|
||||||
.TCENB(1'b0),
|
// .TCENB(1'b0),
|
||||||
.TWENB(128'b0),
|
// .TWENB(128'b0),
|
||||||
.TAB(5'b0),
|
// .TAB(5'b0),
|
||||||
.TDB(128'b0),
|
// .TDB(128'b0),
|
||||||
.RET1N(1'b1),
|
// .RET1N(1'b1),
|
||||||
.SIA(2'b0),
|
// .SIA(2'b0),
|
||||||
.SEA(1'b0),
|
// .SEA(1'b0),
|
||||||
.DFTRAMBYP(1'b0),
|
// .DFTRAMBYP(1'b0),
|
||||||
.SIB(2'b0),
|
// .SIB(2'b0),
|
||||||
.SEB(1'b0),
|
// .SEB(1'b0),
|
||||||
.COLLDISN(1'b1)
|
// .COLLDISN(1'b1)
|
||||||
);
|
// );
|
||||||
/* verilator lint_on PINCONNECTEMPTY */
|
// /* verilator lint_on PINCONNECTEMPTY */
|
||||||
|
|
||||||
endmodule
|
endmodule
|
||||||
|
|||||||
@@ -42,7 +42,7 @@ module VX_scheduler (
|
|||||||
always @(posedge clk or posedge reset) begin
|
always @(posedge clk or posedge reset) begin
|
||||||
|
|
||||||
if (reset) begin
|
if (reset) begin
|
||||||
for (i = 0; i < 32; i = i + 1) rename_table[i] = 0;
|
for (i = 0; i < 32; i = i + 1) rename_table[i] <= 0;
|
||||||
end else begin
|
end else begin
|
||||||
if (valid_wb ) rename_table[VX_writeback_inter.rd] <= 0;
|
if (valid_wb ) rename_table[VX_writeback_inter.rd] <= 0;
|
||||||
if (!schedule_delay && wb_inc) rename_table[VX_bckE_req.rd] <= 1;
|
if (!schedule_delay && wb_inc) rename_table[VX_bckE_req.rd] <= 1;
|
||||||
|
|||||||
@@ -50,7 +50,7 @@ module VX_warp_scheduler (
|
|||||||
|
|
||||||
);
|
);
|
||||||
|
|
||||||
wire[(1+32+`NT_M1):0] d;
|
wire[(1+32+`NT_M1):0] d[`NW-1:0];
|
||||||
|
|
||||||
wire join_fall;
|
wire join_fall;
|
||||||
wire[31:0] join_pc;
|
wire[31:0] join_pc;
|
||||||
@@ -182,11 +182,11 @@ module VX_warp_scheduler (
|
|||||||
end
|
end
|
||||||
end
|
end
|
||||||
|
|
||||||
wire[(1+32+`NT_M1):0] q1 = {1'b1, warp_pcs[split_warp_num], thread_masks[split_warp_num]};
|
wire[(1+32+`NT_M1):0] q1 = {1'b1, 32'b0 , thread_masks[split_warp_num]};
|
||||||
wire[(1+32+`NT_M1):0] q2 = {1'b0, split_save_pc , split_later_mask};
|
wire[(1+32+`NT_M1):0] q2 = {1'b0, split_save_pc , split_later_mask};
|
||||||
|
|
||||||
|
|
||||||
assign {join_fall, join_pc, join_tm} = d;
|
assign {join_fall, join_pc, join_tm} = d[join_warp_num];
|
||||||
|
|
||||||
|
|
||||||
|
|
||||||
@@ -202,7 +202,7 @@ module VX_warp_scheduler (
|
|||||||
.reset(reset),
|
.reset(reset),
|
||||||
.push (push),
|
.push (push),
|
||||||
.pop (pop),
|
.pop (pop),
|
||||||
.d (d),
|
.d (d[curr_warp]),
|
||||||
.q1 (q1),
|
.q1 (q1),
|
||||||
.q2 (q2)
|
.q2 (q2)
|
||||||
);
|
);
|
||||||
|
|||||||
@@ -1,7 +1,7 @@
|
|||||||
# Dynamic Instructions: 12
|
# Dynamic Instructions: 36
|
||||||
# of total cycles: 25
|
# of total cycles: 50
|
||||||
# of forwarding stalls: 0
|
# of forwarding stalls: 0
|
||||||
# of branch stalls: 0
|
# of branch stalls: 0
|
||||||
# CPI: 2.08333
|
# CPI: 1.38889
|
||||||
# time to simulate: 0 milliseconds
|
# time to simulate: 6.95313e-310 milliseconds
|
||||||
# GRADE: Failed on test: 4294967295
|
# GRADE: Failed on test: 4294967295
|
||||||
|
|||||||
@@ -1 +1 @@
|
|||||||
#define VCD_OFF
|
#define VCD_OUTPUT
|
||||||
|
|||||||
@@ -373,8 +373,14 @@ bool Vortex::simulate(std::string file_to_simulate)
|
|||||||
bool cont = false;
|
bool cont = false;
|
||||||
// for (int i = 0; i < 500; i++)
|
// for (int i = 0; i < 500; i++)
|
||||||
|
|
||||||
vortex->clk = 0;
|
vortex->reset = 1;
|
||||||
|
vortex->clk = 0;
|
||||||
vortex->eval();
|
vortex->eval();
|
||||||
|
vortex->reset = 1;
|
||||||
|
vortex->clk = 1;
|
||||||
|
vortex->eval();
|
||||||
|
vortex->reset = 0;
|
||||||
|
vortex->clk = 0;
|
||||||
|
|
||||||
// unsigned cycles;
|
// unsigned cycles;
|
||||||
counter = 0;
|
counter = 0;
|
||||||
|
|||||||
Reference in New Issue
Block a user