Albert Ou 2f1e5e994b toolchains: Flatten riscv-tools submodule
This allows individual components to be better maintained following the
deprecation of riscv-tools.  Eliminate non-essential submodules.

build-static-libfesvr.sh is no longer necessary since libfesvr.a is
built as part of the riscv-isa-sim build.

For simplicity, only riscv-gnu-toolchain is now pre-built instead of the
entirety of riscv-tools.
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Chipyard Framework CircleCI

Using Chipyard

To get started using Chipyard, see the documentation on the Chipyard documentation site: https://chipyard.readthedocs.io/en/latest/

What is Chipyard

Chipyard is an open source starter template for your custom Chisel project. It will allow you to leverage the Chisel HDL, Rocket Chip SoC generator, and other Berkeley projects to produce a RISC-V SoC with everything from MMIO-mapped peripherals to custom accelerators. It contains processor cores (Rocket, BOOM), accelerators (Hwacha), FPGA simulation tools (FireSim), ASIC tools (HAMMER) and other tooling to help create a full featured SoC. Chipyard is actively developed in the Berkeley Architecture Research Group in the Electrical Engineering and Computer Sciences Department at the University of California, Berkeley.

Resources

Description
No description provided
Readme BSD-3-Clause 15 MiB
Languages
Scala 43.1%
C 38.2%
Makefile 6.8%
Shell 3.8%
Python 3.1%
Other 5%