This allows individual components to be better maintained following the deprecation of riscv-tools. Eliminate non-essential submodules. build-static-libfesvr.sh is no longer necessary since libfesvr.a is built as part of the riscv-isa-sim build. For simplicity, only riscv-gnu-toolchain is now pre-built instead of the entirety of riscv-tools.
Chipyard Framework 
Using Chipyard
To get started using Chipyard, see the documentation on the Chipyard documentation site: https://chipyard.readthedocs.io/en/latest/
What is Chipyard
Chipyard is an open source starter template for your custom Chisel project. It will allow you to leverage the Chisel HDL, Rocket Chip SoC generator, and other Berkeley projects to produce a RISC-V SoC with everything from MMIO-mapped peripherals to custom accelerators. It contains processor cores (Rocket, BOOM), accelerators (Hwacha), FPGA simulation tools (FireSim), ASIC tools (HAMMER) and other tooling to help create a full featured SoC. Chipyard is actively developed in the Berkeley Architecture Research Group in the Electrical Engineering and Computer Sciences Department at the University of California, Berkeley.
Resources
- Chipyard Website: ...TBD at a later date...
- Chipyard Documentation: https://chipyard.readthedocs.io/