Abraham Gonzalez
46e2ecb9ae
Fix MacroCompiler for CE-less Library Memories
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If a memory doesn't have a mask and doesn't have a chip enable, make sure that you use the `mem` chip enable to connect to the `we` port on the `lib` memory. Fixes a bug where the `lib` `we` signal would be tied to the `mem` `wmode` signal but then the macro would have no `en` signal connected to it.
2019-11-05 14:04:31 -08:00
Abraham Gonzalez
c8191b95de
bump firesim
2019-11-05 07:06:17 +00:00
Abraham Gonzalez
4ce531c531
add coremark and spec firemarshal workloads
2019-11-05 07:04:07 +00:00
Abraham Gonzalez
8b0ef4d770
Merge pull request #69 from ucb-bar/abejgonzalez-patch-1
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Fix macrocompiler for RW mask port
2019-11-04 13:23:05 -08:00
Abraham Gonzalez
36ec5172c4
Merge pull request #322 from ucb-bar/fix-grep-filter
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make sure grep filter only omits .h files
2019-11-01 18:59:59 -07:00
David Biancolin
e3b30dbd83
[FireChip] Use clock in BridgeBinders
2019-11-01 17:17:57 -07:00
Howard Mao
bd6397130b
make sure grep filter only omits .h files
2019-10-31 20:18:09 -07:00
Abraham Gonzalez
6c59cac744
fix spacing
2019-10-28 13:47:07 -07:00
Abraham Gonzalez
be3b05a909
add test case
2019-10-28 13:45:05 -07:00
Colin Schmidt
c1004790cc
Use x instead of e to match other case
2019-10-28 07:33:04 -07:00
Abraham Gonzalez
7f0828cb30
Fix macrocompiler for RW mask port
2019-10-25 20:42:55 -07:00
Abraham Gonzalez
b73e43a0f5
Merge pull request #318 from ucb-bar/abejgonzalez-patch-1
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Fix VLSI Makefile
2019-10-25 14:04:30 -07:00
Abraham Gonzalez
69d3f9d499
Update vlsi/Makefile [skip ci]
2019-10-25 09:49:20 -07:00
Abraham Gonzalez
540fff55e2
Fix VLSI Makefile [skip ci]
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The `SMEMS_FILE` was supposed to be `TOP_SMEMS_FILE`
2019-10-25 09:47:22 -07:00
Colin Schmidt
c96a5e5f44
Print the firrtl exception if we get one
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Fixes #67
2019-10-24 14:55:03 -07:00
Colin Schmidt
b934c51315
Add phony firrtl target to just build firrtl file ( #317 )
2019-10-24 10:26:45 -07:00
Howard Mao
e859fb1779
make sure blackbox resource files always created
2019-10-21 09:55:40 -07:00
Howard Mao
05af2f9a9c
Fix tracegen target and add to CI
2019-10-21 09:55:40 -07:00
Abraham Gonzalez
ced4d2eea0
Merge pull request #314 from ucb-bar/master
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`master` fixes into `dev`
2019-10-18 21:05:29 -04:00
Abraham Gonzalez
2f3ac85c2a
Merge pull request #315 from ucb-bar/hwacha-boom
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add large boom hwacha config
2019-10-18 19:22:30 -04:00
abejgonzalez
929110f562
add large boom hwacha config
2019-10-18 16:18:16 -07:00
Albert Magyar
0d5bcf9c0d
Add FireChip target with Verilog blackbox ( #297 )
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Co-Authored-By: Abraham Gonzalez <abe.j.gonza@gmail.com >
2019-10-16 14:31:58 -07:00
harrisonliew
701129fb62
[docs][ci skip] Remove extra backticks in docs ( #312 )
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Closes #299
2019-10-16 10:43:55 -07:00
Colin Schmidt
b0b6466c22
handle asap7 lack of memories in makefile
2019-10-16 10:32:56 -07:00
Colin Schmidt
784bff2666
[docs][ci skip] Remove extra backticks in docs
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Also fix sram-cache error. Fixes #299
2019-10-16 08:40:20 -07:00
Abraham Gonzalez
61ca6fa294
Merge pull request #307 from ucb-bar/fix-ci
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Fix `master` CI
2019-10-16 08:06:37 -04:00
abejgonzalez
c87b69fcbf
fix spacing in init-submodules-no-riscv-tools.sh
2019-10-15 21:14:27 -07:00
Abraham Gonzalez
c308985ae2
Merge pull request #308 from ucb-bar/log-tests
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Log tests
2019-10-16 00:05:18 -04:00
abejgonzalez
f0fa623000
also check firesim
2019-10-15 10:31:09 -07:00
abejgonzalez
2c4783bfe9
remove *.out file for fast sims
2019-10-15 07:23:37 -07:00
abejgonzalez
8f2c5d4796
add *.log files whenever a binary is run
2019-10-14 20:55:40 -07:00
Abraham Gonzalez
eee48dc2a1
Merge pull request #304 from ucb-bar/new-env
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Add a specific toolchain `env.sh`
2019-10-14 21:14:29 -04:00
abejgonzalez
7e908b4964
update ci to exit at the end instead of partway through | fix flattened toolchain repos
2019-10-14 13:27:58 -07:00
Abraham Gonzalez
b004ecc8bf
Merge pull request #284 from ucb-bar/add-hwacha-tests
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Check and add Hwacha tests
2019-10-14 13:43:24 -04:00
Abraham Gonzalez
7150f509b7
Merge pull request #305 from ucb-bar/master
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Get `master` CI fix
2019-10-14 13:37:33 -04:00
abejgonzalez
112fe43f60
add -f flag
2019-10-14 10:36:15 -07:00
David Biancolin
84611fed8a
[CI] Completely remove the clockdiv tests
2019-10-13 15:22:49 -07:00
David Biancolin
46289ec284
Bump FireSim
2019-10-13 14:20:23 -04:00
David Biancolin
2e5f29031e
[CI] Remove clock-division based FC tests
2019-10-13 14:08:48 -04:00
David Biancolin
8c28f03ba1
[FireChip] Remove by3 clock division FASED config
2019-10-13 14:08:10 -04:00
Abraham Gonzalez
abe5262ae7
Merge pull request #302 from ucb-bar/ci-fix
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(master) Fix commit on master CI check
2019-10-13 08:54:31 -07:00
abejgonzalez
8af172c313
update ci to use example generator
2019-10-13 08:43:52 -07:00
Abraham Gonzalez
9babeb9743
Remove BuildRoCC param
2019-10-13 08:41:21 -07:00
abejgonzalez
d6bcf2870f
cleaner test for hwacha param
2019-10-13 08:37:38 -07:00
abejgonzalez
33664cf11e
add a specific toolchain env
2019-10-13 08:24:57 -07:00
abejgonzalez
1c55e67c7f
fix check commit ci check
2019-10-13 08:15:42 -07:00
abejgonzalez
a3b2d40d08
Merge remote-tracking branch 'origin/dev' into add-hwacha-tests
2019-10-13 07:07:52 -07:00
David Biancolin
be38ec5efa
Bump FireSim
2019-10-12 05:47:55 +00:00
David Biancolin
ca3eff022e
Merge remote-tracking branch 'origin' into dev
2019-10-12 05:36:06 +00:00
David Biancolin
5e7875f080
Merge pull request #292 from seldridge/website
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Use new website links
2019-10-12 00:10:14 -04:00