alonamid
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76b747dc84
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Merge pull request #836 from ucb-bar/firesim-default-freqs
Sane FireSim Default Target Freqs
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2021-06-08 14:33:57 -07:00 |
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alonamid
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610adfc3f7
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address PR review comments
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2021-06-03 22:23:17 -07:00 |
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alonamid
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f2b56072a1
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remove crossings in single clock domain
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2021-06-02 21:26:29 -07:00 |
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alonamid
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06b8cf84f9
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update default firesim config freqs
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2021-06-02 20:00:02 -07:00 |
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alonamid
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225cf9d29a
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update frequency config fragements
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2021-06-01 16:40:31 -07:00 |
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David Biancolin
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15a30a73e9
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[firechip] Memomize Clock RecordMap creation to fix supernode
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2021-05-07 06:39:45 +00:00 |
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alonamid
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b99d6bb7ac
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multiclock config multiple
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2021-03-29 00:01:13 -07:00 |
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alonamid
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c93cd255ab
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sane firesim default target freqs
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2021-03-25 23:28:07 -07:00 |
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abejgonzalez
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09ef82cabf
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Update harnessClk/Rst naming to buildtop | Small docs cleanup
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2021-03-22 13:11:12 -07:00 |
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abejgonzalez
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5ffad327db
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Bump testchipip
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2021-03-21 15:34:01 -07:00 |
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abejgonzalez
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55263971bc
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Use async queue to connect serdesser + other components
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2021-03-19 20:49:49 -07:00 |
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abejgonzalez
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1e42113926
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Splitting up FireSim default frequencies into a separate config frag.
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2021-03-19 17:33:39 -07:00 |
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abejgonzalez
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5301723404
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Use def instead of var Option for ref frequency
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2021-03-16 19:42:24 -07:00 |
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abejgonzalez
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6476c7e7f0
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Small renaming/cleanup | Use LinkedHashMaps
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2021-03-15 16:54:42 -07:00 |
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Jerry Zhao
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a013f0d561
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Fix SerialTL HarnessRAM BridgeBinder
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2021-03-15 15:09:29 -07:00 |
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Jerry Zhao
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8a78565c04
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Update BridgeBinders with new HarnessRAM clocking
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2021-03-15 12:45:40 -07:00 |
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Abraham Gonzalez
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e4ccfe1bb9
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Renaming updates | Have FireSim clocks request frequency by default
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2021-03-08 23:43:00 +00:00 |
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Abraham Gonzalez
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6ab8f8f8fc
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Update FireSim to support harness clocks | Small config renaming
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2021-03-08 22:03:07 +00:00 |
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Abraham Gonzalez
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3d962180be
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Cleanup | Fix BlockDevice clocking issues
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2021-03-03 19:44:55 +00:00 |
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Abraham Gonzalez
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c52fce79ae
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Fix FireChip compilation | Remove extra DefaultSerialTL in bridges
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2021-03-03 07:25:49 +00:00 |
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abejgonzalez
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f850df7a9f
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General renaming / cleanup
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2021-03-02 22:58:05 -08:00 |
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Abraham Gonzalez
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1d287bede5
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Enlarge serial width | Bugfix loadmem disable | Add TracerV
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2021-03-03 02:43:38 +00:00 |
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Abraham Gonzalez
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a3e22c78de
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First attempt at getting Offchip AXI port
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2021-02-28 22:27:18 +00:00 |
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alonamid
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6dcd4f9afc
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WithFireSimFAME5 to allow non Rocket/BOOM build
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2021-02-01 17:33:07 -08:00 |
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Albert Magyar
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f7a98f23bc
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Merge pull request #756 from ucb-bar/16-largeboom
Add 16-core LargeBOOM config to firechip
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2021-01-13 15:36:51 -08:00 |
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Albert Magyar
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c481dc2ee8
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Add 16-core LargeBOOM config to firechip
* Fix Jerry's comment on accidentally mixing multiple BOOM configs
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2021-01-12 23:12:10 -08:00 |
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David Biancolin
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1bd51447fe
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[ci skip] Fix Typo in firechip/src/test/scala/ScalaTestSuite.scala
Co-authored-by: Abraham Gonzalez <abe.j.gonza@gmail.com>
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2020-12-13 10:45:51 -05:00 |
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David Biancolin
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8f1e20936f
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Update FireSim CI. Push threading into test context
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2020-12-12 13:41:32 -08:00 |
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David Biancolin
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ee436c9b3f
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[firechip] Fix a uart multiclock bug
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2020-12-10 07:18:12 +00:00 |
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David Biancolin
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230bd81e0e
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[firechip] Update legacy firechip config
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2020-11-09 09:26:30 -08:00 |
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Abraham Gonzalez
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5c5a4b51e3
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Merge pull request #710 from ucb-bar/rename-ariane
Rename Ariane to CVA6
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2020-11-06 14:53:54 -08:00 |
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abejgonzalez
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a2ebbee2ac
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Rename Ariane to CVA6
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2020-11-04 15:42:30 -08:00 |
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David Biancolin
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f504b7a0f5
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[clocking] Improve reference clock selection using a multiple-of-fastest strategy
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2020-11-03 09:14:55 -08:00 |
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Jerry Zhao
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e0bf907a06
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Merge remote-tracking branch 'origin/dev' into lazy-iobinders
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2020-10-19 13:22:01 -07:00 |
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Jerry Zhao
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9927231bc4
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Support lazy-iobinders
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2020-10-17 22:47:50 -07:00 |
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David Biancolin
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1b94e7f10c
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Merge remote-tracking branch 'origin/dev' into diplomatic-clocks-mbus-crossing
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2020-10-16 23:21:20 +00:00 |
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Albert Magyar
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84e0bf7338
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Don't annotate cores with FAMEModelAnnotations
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2020-10-15 12:25:39 -07:00 |
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Alon Amid
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2c935b4ad7
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pull firesim mem model config into firesim tweaks
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2020-10-15 17:07:51 +00:00 |
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David Biancolin
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9c8d2948af
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[firechip] Fix a broken config
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2020-10-14 15:33:32 -07:00 |
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David Biancolin
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6aefb73ab5
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Merge remote-tracking branch 'origin/dev' into diplomatic-clocks-mbus-crossing
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2020-10-14 15:29:00 -07:00 |
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David Biancolin
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211c33f996
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Address comments in #690
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2020-10-14 14:42:45 -07:00 |
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David Biancolin
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986b5831c8
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[clocking] Sketch out a topology that puts the MBUS is a separate domain
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2020-10-09 07:23:17 -07:00 |
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David Biancolin
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392d5b0801
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[clocking] Synchronize all output clocks from DividerOnly generator
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2020-10-07 09:32:48 -07:00 |
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Jerry Zhao
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b057cfbd8c
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Merge remote-tracking branch 'origin/dev' into clocking-features
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2020-10-01 20:12:20 -07:00 |
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Jerry Zhao
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79042e4ce8
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Bump to support firesim simulation of no-AXI4DRAM designs
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2020-10-01 10:21:43 -07:00 |
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Albert Magyar
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2f5790d611
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Add model multi-threading annotations (ignored by default) to FireChip
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2020-09-30 23:32:49 -07:00 |
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David Biancolin
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5b414f5829
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[clocks] Emit frequency summary for divider-only PLL model
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2020-09-29 16:59:37 -07:00 |
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David Biancolin
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b76972d34b
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Merge remote-tracking branch 'origin/dev' into diplomatic-clocks-pll-redux
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2020-09-25 11:02:51 -07:00 |
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David Biancolin
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67145c6ccd
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[clocking] Fix FireSim clock look up
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2020-09-25 10:05:28 -07:00 |
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David Biancolin
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7b8a954d04
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[firechip] Rework FireSim clocking to be more similar to default CY targets
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2020-09-24 23:32:07 -07:00 |
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