Hansung Kim
b15765184e
[ci] Trim down chipyard-ci-gpu
2023-10-05 14:24:34 -07:00
Hansung Kim
3f16019e41
Merge remote-tracking branch 'origin/fix-insert-includes-python' into graphics
2023-10-05 11:24:02 -07:00
Hansung Kim
921b0c062e
Use env python interpreter in insert-includes.py
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This fixes failing CI for CVA6/nvdla on a system that does not have a
/usr/bin/python interpreter by making the script use one from conda env.
2023-10-05 11:15:42 -07:00
Hansung Kim
875158a60f
[ci] Remove debug lines added in create-conda-env
2023-10-05 11:09:13 -07:00
Hansung Kim
debdd35b13
[ci] Fix commit-on-master-check to find rocket-chip on graphics
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... and remove prepare-chipyard-fpga.
2023-10-04 20:31:39 -07:00
Hansung Kim
24433584ae
[ci] Disable FPGA tests
2023-10-04 20:02:14 -07:00
Hansung Kim
cac5c57b7d
[ci] Attempt 2
2023-10-04 18:29:28 -07:00
Hansung Kim
994e46f7c4
[ci] Attempt to fix conda init
2023-10-04 18:24:03 -07:00
Hansung Kim
e67537d689
[ci] Resurrect create-conda-env, change all to self-hosted
2023-10-04 17:23:50 -07:00
Hansung Kim
7a65813259
[ci] Create ci-gpu for every push on graphics
2023-10-04 16:52:27 -07:00
Hansung Kim
d6be26ed42
[ci] Revert running ci-process on every push
2023-10-04 16:52:02 -07:00
Hansung Kim
2598a96187
[ci] Run ci-process on every push to graphics
2023-10-04 16:41:17 -07:00
Hansung Kim
ffe1b74e67
Add gen-collateral to Verilator include dir
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This fixes VX_define.vh not being found when compiling Vortex verilog
sources.
2023-10-01 19:37:31 -07:00
Hansung Kim
3d7caa41e8
Merge remote-tracking branch 'upstream/main' into graphics
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Bumped rocket-chip and testchipip to graphics
2023-10-01 17:57:36 -07:00
joshua
12e66e76c5
bump rocket + update VortexCache config
2023-09-29 00:54:55 -07:00
joshua
0de6ec7c0f
Merge remote-tracking branch 'origin/graphics' into graphics
2023-09-28 11:39:03 -07:00
Hansung Kim
d801e12d3d
Change bootrom path for GPU
2023-09-27 14:37:46 -07:00
Richard Yan
50277f3209
bump rocket-chip and testchipip
2023-09-27 10:54:26 -07:00
Jerry Zhao
adebd634b4
Fix Arty100T Verilog build ( #1608 )
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* Bump rocket-chip
* Bump fpga-shells
* Add Arty100T Verilog build to CI
* Fix Arty100T harness disconnected LEDs
2023-09-27 13:03:37 +02:00
Richard Yan
ec63986310
fix testchipip
2023-09-26 16:16:05 -07:00
joshua
52c79e4b15
Merge remote-tracking branch 'origin/graphics' into graphics
2023-09-25 23:44:23 -07:00
joshua
477e88f95b
new rocketconfig for vx_cache
2023-09-25 23:44:12 -07:00
Richard Yan
8a2aa54a1c
add operand roms, point testchipip to fork, bump rocket
2023-09-25 21:29:25 -07:00
Jerry Zhao
8c1319073c
Merge pull request #1601 from ucb-bar/no-mcaxiram
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Remove MultiClockHarnessAXIMem
2023-09-20 21:26:40 -07:00
Jerry Zhao
7106200d9d
Fix HarnessClockInstantiatorEx doc reference
2023-09-20 11:46:42 -07:00
Jerry Zhao
9ab5067e35
Update docs on bringup sims
2023-09-20 11:44:43 -07:00
Jerry Zhao
0fd04c302f
Merge pull request #1602 from ucb-bar/mihai-temp
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Updated docs on waveform generation to match current workflow.
2023-09-17 10:34:02 -07:00
Jerry Zhao
affbdc254b
Update docs/Simulation/Software-RTL-Simulation.rst
2023-09-17 10:33:42 -07:00
Mihai Tudor
0de940b6a0
Updated docs on waveform generation
2023-09-16 19:48:59 -07:00
Jerry Zhao
57ee757016
Remove MultiClockHarnessAXIMem
...
Previously, the MultiClockHarnessAXIMem stuff attached SimDRAM over the serial-tl link.
This was done to enable test-chip-like simulations, where the HarnessBinder/BridgeBinder
would effectively implement a similar system as what would go on the bringup platform.
Now that multi-chip-tops are supported, and co-simulation of the ChipTop and the BringupTop
are supported, we can remove all this old Harness-level stuff to reduce duplication
2023-09-16 09:47:47 -07:00
Richard Yan
1c76515f17
add args.bin and large extmem to config
2023-09-15 11:18:22 -07:00
Richard Yan
59b0994620
bump rocket and update config
2023-09-11 14:06:50 -07:00
Abraham Gonzalez
174ebc50b7
Merge pull request #1598 from ucb-bar/remove-dromajo
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Remove Dromajo
2023-09-10 16:13:14 -07:00
Richard Yan
ee00fa11ab
bump rocket-chip and add memory to radiance config
2023-09-09 01:56:17 -07:00
abejgonzalez
dafd7be273
Bump docs
2023-09-08 15:32:01 -07:00
abejgonzalez
6fab524b20
Bump
2023-09-08 15:13:52 -07:00
abejgonzalez
df598c6b80
Run all CI locally
2023-09-08 15:07:32 -07:00
abejgonzalez
284f276fbb
Remove Dromajo + documentation
2023-09-08 14:28:10 -07:00
Richard Yan
df4e812b7c
add radiance config and bump rocket
2023-09-08 14:27:06 -07:00
Jerry Zhao
12248a221c
Merge pull request #1597 from ucb-bar/jerryz123-patch-2
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Fix VCU118 freq adjustment configs
2023-09-06 20:11:43 -07:00
Jerry Zhao
0b81a82459
Fix VCU118 freq adjustment configs
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Resolves #1583
2023-09-06 10:55:53 -07:00
Abraham Gonzalez
48dcce2204
Merge pull request #1588 from ucb-bar/cospike-integration
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Replace Dromajo FireSim bridge with Cospike
2023-09-05 11:58:07 -07:00
Jerry Zhao
e148a32e6b
Merge pull request #1514 from ucb-bar/klayout-docs
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KLayout section of Sky130+OpenROAD tutorial
2023-09-05 11:41:09 -07:00
Jerry Zhao
bc10cdac35
Merge pull request #1595 from ucb-bar/bump-sifive-cache
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bump sifive cache
2023-09-05 09:48:28 -07:00
Jerry Zhao
8c55fef690
Merge pull request #1584 from ucb-bar/jerryz123-patch-1
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Clarify fragments in ChipLikeRocketConfigs.scala
2023-09-04 15:33:00 -07:00
joey0320
2c6a1c6580
bump sifive cache
2023-09-04 14:54:50 -07:00
abejgonzalez
5541582639
Bump Boom
2023-09-04 12:23:07 -07:00
abejgonzalez
3c42e63732
Bump FireSim
2023-08-30 22:17:17 -07:00
abejgonzalez
8044b26dfe
Bump testchipip
2023-08-30 22:16:08 -07:00
abejgonzalez
44f042a152
Merge remote-tracking branch 'origin/main' into cospike-integration
2023-08-30 18:06:31 -07:00
