[WIP] Minimally elaborating design
Bring up a feature-complete Chipyard stage
Pull in Makefrag generation; Bump submodules
Update config generation, and global reset scheme
Bump submodules; clean up
Bump FireSim
Remove some unhygenic comments / WS
Remove the rocketchip subproject
[CI] Lengthen ariane tests timeout
Address some remaining reviewer comments
[firechip] Refresh a Field that cannot be used across repeated instantiations
Bump all submodules
* [ariane/make] integrate ariane | have verilator be installed on path not in makefile
* [misc] warn on verilator not found | search for v files | cleanup build.sbt + .gitignore
* [firesim] bump
* [ci] add midas ariane tests
* [docker/ci] use new docker-image with verilator | re-elab on v changes for ariane | address comments
* [ci] remove references to local verilator install
* [verilator] update flags
* [verilator] minimal set of flags for ariane
* [ariane] bump ariane to master
* [ci] revert to 4.016 verilator
* [ci] install verilator to ci server | misc compile fixes
* [ci/make] add longer ci timeout | update when assert is added in verilator sim
* [firesim] bump for misc. updates
* [make/ci] cleanup makefile and remove firesim tests of it
* [docs/firesim] bump and clean docs
* [firesim] bump
* [ci] use remote verilator for midas tests
* [misc] cleanup built.sbt more
* [firesim] bump
* [misc] bump build.sbt patch for tutorials
* [firesim/ci] cleanup and bump firesim
* Bump all submodules for chisel 3.2.0 and rocket-chip august-2019
* Fix subprojects that aren't tested from normal sims
* Fix firechip for chisel 3.2.0 and rc bump
* Bump boom for bug fix rebase
* [sbt] Don't rely on target-rtl symlink when FireSim is top [no ci]
* Bump boom for rc bump fix to bug fix
* Bump FireSim for CI check
* Bump FireSim
* Bump submodules after merge
