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Rename top-level example package to chipyard

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* FireChip now directly uses the Chipyard Top
This commit is contained in:
Jerry Zhao
2020-01-22 12:38:38 -08:00
parent 7bcedfa7ad
commit 49dbe8daba
26 changed files with 82 additions and 151 deletions
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105
.circleci/config.yml
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@@ -188,105 +188,76 @@ jobs:
key: extra-tests-{{ .Branch }}-{{ .Revision }}
paths:
- "/home/riscvuser/project/tests"
prepare-example:
prepare-chipyard-rocket:
executor: main-env
steps:
- prepare-rtl:
project-key: "example"
prepare-boomrocketexample:
project-key: "chipyard-rocket"
prepare-chipyard-hetero:
executor: main-env
steps:
- prepare-rtl:
project-key: "boomrocketexample"
project-key: "chipyard-hetero"
timeout: "240m"
prepare-boom:
prepare-chipyard-boom:
executor: main-env
steps:
- prepare-rtl:
project-key: "boom"
project-key: "chipyard-boom"
prepare-rocketchip:
executor: main-env
steps:
- prepare-rtl:
project-key: "rocketchip"
prepare-blockdevrocketchip:
prepare-chipyard-blkdev:
executor: main-env
steps:
- prepare-rtl:
project-key: "blockdevrocketchip"
prepare-hwacha:
project-key: "chipyard-blkdev"
prepare-chipyard-hwacha:
executor: main-env
steps:
- prepare-rtl:
tools-version: "esp-tools"
project-key: "hwacha"
prepare-gemmini:
project-key: "chipyard-hwacha"
prepare-chipyard-gemmini:
executor: main-env
steps:
- prepare-rtl:
tools-version: "esp-tools"
project-key: "gemmini"
prepare-tracegen:
executor: main-env
steps:
- prepare-rtl:
project-key: "tracegen"
prepare-tracegen-boom:
executor: main-env
steps:
- prepare-rtl:
project-key: "tracegen-boom"
prepare-firesim:
executor: main-env
steps:
- prepare-rtl:
project-key: "firesim"
build-script: "do-firesim-build.sh"
prepare-fireboom:
executor: main-env
steps:
- prepare-rtl:
project-key: "fireboom"
build-script: "do-firesim-build.sh"
midasexamples-run-tests:
executor: main-env
steps:
- setup-tools-verilator
- run:
name: Run midasexamples tests
command: .circleci/run-midasexamples-tests.sh
example-run-tests:
project-key: "chipyard-gemmini"
chipyard-rocket-run-tests:
executor: main-env
steps:
- run-tests:
project-key: "example"
boomrocketexample-run-tests:
project-key: "chipyard-rocket"
chipyard-hetero-run-tests:
executor: main-env
steps:
- run-tests:
project-key: "boomrocketexample"
boom-run-tests:
project-key: "chipyard-hetero"
chipyard-boom-run-tests:
executor: main-env
steps:
- run-tests:
project-key: "boom"
project-key: "chipyard-boom"
rocketchip-run-tests:
executor: main-env
steps:
- run-tests:
project-key: "rocketchip"
hwacha-run-tests:
chipyard-hwacha-run-tests:
executor: main-env
steps:
- run-tests:
tools-version: "esp-tools"
project-key: "hwacha"
gemmini-run-tests:
project-key: "chipyard-hwacha"
chipyard-gemmini-run-tests:
executor: main-env
steps:
- run-tests:
tools-version: "esp-tools"
project-key: "gemmini"
project-key: "chipyard-gemmini"
tracegen-run-tests:
executor: main-env
steps:
@@ -346,17 +317,17 @@ workflows:
- install-riscv-toolchain
# Prepare the verilator builds
- prepare-example:
- prepare-chipyard-rocket:
requires:
- install-riscv-toolchain
- install-verilator
- prepare-boomrocketexample:
- prepare-chipyard-hetero:
requires:
- install-riscv-toolchain
- install-verilator
- prepare-boom:
- prepare-chipyard-boom:
requires:
- install-riscv-toolchain
- install-verilator
@@ -366,17 +337,17 @@ workflows:
- install-riscv-toolchain
- install-verilator
- prepare-blockdevrocketchip:
- prepare-chipyard-blkdev:
requires:
- install-riscv-toolchain
- install-verilator
- prepare-hwacha:
- prepare-chipyard-hwacha:
requires:
- install-esp-toolchain
- install-verilator
- prepare-gemmini:
- prepare-chipyard-gemmini:
requires:
- install-esp-toolchain
- install-verilator
@@ -410,29 +381,29 @@ workflows:
- install-verilator
# Run the example tests
- example-run-tests:
- chipyard-rocket-run-tests:
requires:
- prepare-example
- prepare-chipyard-rocket
- boomrocketexample-run-tests:
- chipyard-hetero-run-tests:
requires:
- prepare-boomrocketexample
- prepare-chipyard-hetero
- boom-run-tests:
- chipyard-boom-run-tests:
requires:
- prepare-boom
- prepare-chipyard-boom
- rocketchip-run-tests:
requires:
- prepare-rocketchip
- hwacha-run-tests:
- chipyard-hwacha-run-tests:
requires:
- prepare-hwacha
- prepare-chipyard-hwacha
- gemmini-run-tests:
- chipyard-gemmini-run-tests:
requires:
- prepare-gemmini
- prepare-chipyard-gemmini
- tracegen-run-tests:
requires:

12
.circleci/defaults.sh
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@@ -41,13 +41,13 @@ LOCAL_FIRESIM_DIR=$LOCAL_CHIPYARD_DIR/sims/firesim/sim
# key value store to get the build strings
declare -A mapping
mapping["example"]="SUB_PROJECT=example"
mapping["boomrocketexample"]="SUB_PROJECT=example CONFIG=LargeBoomAndRocketConfig"
mapping["boom"]="SUB_PROJECT=example CONFIG=SmallBoomConfig"
mapping["chipyard-rocket"]="SUB_PROJECT=chipyard"
mapping["chipyard-hetero"]="SUB_PROJECT=chipyard CONFIG=LargeBoomAndRocketConfig"
mapping["chipyard-boom"]="SUB_PROJECT=chipyard CONFIG=SmallBoomConfig"
mapping["rocketchip"]="SUB_PROJECT=rocketchip"
mapping["blockdevrocketchip"]="SUB_PROJECT=example CONFIG=SimBlockDeviceRocketConfig"
mapping["hwacha"]="SUB_PROJECT=example CONFIG=HwachaRocketConfig"
mapping["gemmini"]="SUB_PROJECT=example CONFIG=GemminiRocketConfig"
mapping["chipyard-blkdev"]="SUB_PROJECT=chipyard CONFIG=SimBlockDeviceRocketConfig"
mapping["chipyard-hwacha"]="SUB_PROJECT=chipyard CONFIG=HwachaRocketConfig"
mapping["chipyard-gemmini"]="SUB_PROJECT=chipyard CONFIG=GemminiRocketConfig"
mapping["tracegen"]="SUB_PROJECT=tracegen CONFIG=NonBlockingTraceGenL2Config"
mapping["tracegen-boom"]="SUB_PROJECT=tracegen CONFIG=BoomTraceGenConfig"
mapping["firesim"]="DESIGN=FireSim TARGET_CONFIG=DDR3FRFCFSLLC4MB_FireSimRocketChipConfig PLATFORM_CONFIG=BaseF1Config"

2
.circleci/do-rtl-build.sh
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@@ -32,7 +32,7 @@ run "cp -r ~/.sbt $REMOTE_WORK_DIR"
TOOLS_DIR=$REMOTE_RISCV_DIR
LD_LIB_DIR=$REMOTE_RISCV_DIR/lib
if [ $1 = "hwacha" ] || [ $1 = "gemmini" ]; then
if [ $1 = "chipyard-hwacha" ] || [ $1 = "chipyard-gemmini" ]; then
TOOLS_DIR=$REMOTE_ESP_DIR
LD_LIB_DIR=$REMOTE_ESP_DIR/lib
run "mkdir -p $REMOTE_ESP_DIR"

19
.circleci/run-tests.sh
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@@ -29,28 +29,25 @@ run_tracegen () {
}
case $1 in
example)
chipyard-rocket)
run_bmark ${mapping[$1]}
;;
boomexample)
chipyard-boom)
run_bmark ${mapping[$1]}
;;
boomrocketexample)
run_bmark ${mapping[$1]}
;;
boom)
chipyard-hetero)
run_bmark ${mapping[$1]}
;;
rocketchip)
run_bmark ${mapping[$1]}
;;
hwacha)
chipyard-hwacha)
export RISCV=$LOCAL_ESP_DIR
export LD_LIBRARY_PATH=$LOCAL_ESP_DIR/lib
export PATH=$RISCV/bin:$PATH
make run-rv64uv-p-asm-tests -j$NPROC -C $LOCAL_SIM_DIR VERILATOR_INSTALL_DIR=$LOCAL_VERILATOR_DIR ${mapping[$1]}
;;
gemmini)
chipyard-gemmini)
export RISCV=$LOCAL_ESP_DIR
export LD_LIBRARY_PATH=$LOCAL_ESP_DIR/lib
export PATH=$RISCV/bin:$PATH
@@ -58,9 +55,9 @@ case $1 in
cd $GEMMINI_SOFTWARE_DIR
./build.sh
cd $LOCAL_SIM_DIR
$LOCAL_SIM_DIR/simulator-example-GemminiRocketConfig $GEMMINI_SOFTWARE_DIR/build/bareMetalC/aligned-baremetal
$LOCAL_SIM_DIR/simulator-example-GemminiRocketConfig $GEMMINI_SOFTWARE_DIR/build/bareMetalC/raw_hazard-baremetal
$LOCAL_SIM_DIR/simulator-example-GemminiRocketConfig $GEMMINI_SOFTWARE_DIR/build/bareMetalC/mvin_mvout-baremetal
make run-binary ${mapping[$1]} BINARY=$GEMMINI_SOFTWARE_DIR/build/bareMetalC/aligned-baremetal
make run-binary ${mapping[$1]} BINARY=$GEMMINI_SOFTWARE_DIR/build/bareMetalC/raw_hazard-baremetal
make run-binary ${mapping[$1]} BINARY=$GEMMINI_SOFTWARE_DIR/build/bareMetalC/mvin_mvout-baremetal
;;
tracegen)
run_tracegen ${mapping[$1]}

7
build.sbt
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@@ -122,7 +122,7 @@ lazy val testchipip = (project in file("generators/testchipip"))
.dependsOn(rocketchip, sifive_blocks)
.settings(commonSettings)
lazy val example = conditionalDependsOn(project in file("generators/example"))
lazy val chipyard = conditionalDependsOn(project in file("generators/chipyard"))
.dependsOn(boom, hwacha, sifive_blocks, sifive_cache, utilities, sha3, gemmini, icenet)
.settings(commonSettings)
@@ -131,7 +131,6 @@ lazy val tracegen = conditionalDependsOn(project in file("generators/tracegen"))
.settings(commonSettings)
lazy val utilities = conditionalDependsOn(project in file("generators/utilities"))
.dependsOn(rocketchip, boom)
.settings(commonSettings)
lazy val icenet = (project in file("generators/icenet"))
@@ -155,7 +154,7 @@ lazy val gemmini = (project in file("generators/gemmini"))
.settings(commonSettings)
lazy val tapeout = conditionalDependsOn(project in file("./tools/barstools/tapeout/"))
.dependsOn(chisel_testers, example)
.dependsOn(chisel_testers, chipyard)
.settings(commonSettings)
lazy val mdf = (project in file("./tools/barstools/mdf/scalalib/"))
@@ -196,7 +195,7 @@ lazy val midas = ProjectRef(firesimDir, "midas")
lazy val firesimLib = ProjectRef(firesimDir, "firesimLib")
lazy val firechip = (project in file("generators/firechip"))
.dependsOn(boom, hwacha, example, icenet, testchipip, sifive_blocks, sifive_cache, sha3, utilities, tracegen, midasTargetUtils, midas, firesimLib % "test->test;compile->compile")
.dependsOn(boom, hwacha, chipyard, icenet, testchipip, sifive_blocks, sifive_cache, sha3, utilities, tracegen, midasTargetUtils, midas, firesimLib % "test->test;compile->compile")
.settings(
commonSettings,
testGrouping in Test := isolateAllTests( (definedTests in Test).value )

0
generators/example/src/main/resources/vsrc/GCDMMIOBlackBox.v → generators/chipyard/src/main/resources/vsrc/GCDMMIOBlackBox.v
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2
generators/example/src/main/scala/BoomConfigs.scala → generators/chipyard/src/main/scala/BoomConfigs.scala
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@@ -1,4 +1,4 @@
package example
package chipyard
import chisel3._

2
generators/example/src/main/scala/ConfigMixins.scala → generators/chipyard/src/main/scala/ConfigMixins.scala
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@@ -1,4 +1,4 @@
package example
package chipyard
import chisel3._
import chisel3.util.{log2Up}

2
generators/example/src/main/scala/GCD.scala → generators/chipyard/src/main/scala/GCD.scala
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@@ -1,4 +1,4 @@
package example
package chipyard
import chisel3._
import chisel3.util._

4
generators/example/src/main/scala/Generator.scala → generators/chipyard/src/main/scala/Generator.scala
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@@ -1,4 +1,4 @@
package example
package chipyard
import scala.util.Try
@@ -8,8 +8,6 @@ import freechips.rocketchip.config.{Parameters}
import freechips.rocketchip.util.{GeneratorApp}
import freechips.rocketchip.system.{TestGeneration}
import utilities.{TestSuiteHelper}
object Generator extends GeneratorApp {
// add unique test suites
override def addTestSuites {

2
generators/example/src/main/scala/HeteroConfigs.scala → generators/chipyard/src/main/scala/HeteroConfigs.scala
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@@ -1,4 +1,4 @@
package example
package chipyard
import chisel3._

2
generators/example/src/main/scala/InitZero.scala → generators/chipyard/src/main/scala/InitZero.scala
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@@ -1,4 +1,4 @@
package example
package chipyard
import chisel3._
import chisel3.util._

2
generators/example/src/main/scala/NodeTypes.scala → generators/chipyard/src/main/scala/NodeTypes.scala
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@@ -1,4 +1,4 @@
package example
package chipyard
import freechips.rocketchip.config.Parameters
import freechips.rocketchip.diplomacy._

0
generators/example/src/main/scala/RegisterNodeExample.scala → generators/chipyard/src/main/scala/RegisterNodeExample.scala
View File

2
generators/example/src/main/scala/RocketConfigs.scala → generators/chipyard/src/main/scala/RocketConfigs.scala
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@@ -1,4 +1,4 @@
package example
package chipyard
import chisel3._

2
generators/utilities/src/main/scala/Subsystem.scala → generators/chipyard/src/main/scala/Subsystem.scala
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@@ -3,7 +3,7 @@
// All Rights Reserved. See LICENSE and LICENSE.SiFive for license details.
//------------------------------------------------------------------------------
package utilities
package chipyard
import chisel3._
import chisel3.internal.sourceinfo.{SourceInfo}

2
generators/utilities/src/main/scala/System.scala → generators/chipyard/src/main/scala/System.scala
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@@ -3,7 +3,7 @@
// All Rights Reserved. See LICENSE and LICENSE.SiFive for license details.
//------------------------------------------------------------------------------
package utilities
package chipyard
import chisel3._

2
generators/example/src/main/scala/TestHarness.scala → generators/chipyard/src/main/scala/TestHarness.scala
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@@ -1,4 +1,4 @@
package example
package chipyard
import chisel3._
import chisel3.experimental._

2
generators/utilities/src/main/scala/TestSuites.scala → generators/chipyard/src/main/scala/TestSuites.scala
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@@ -1,4 +1,4 @@
package utilities
package chipyard
import scala.collection.mutable.{LinkedHashSet}

4
generators/example/src/main/scala/Top.scala → generators/chipyard/src/main/scala/Top.scala
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@@ -1,4 +1,4 @@
package example
package chipyard
import chisel3._
@@ -10,8 +10,6 @@ import freechips.rocketchip.util.DontTouch
import testchipip._
import utilities.{System, SystemModule}
import sifive.blocks.devices.gpio._
import sifive.blocks.devices.uart._

2
generators/example/src/main/scala/TopCakes.scala → generators/chipyard/src/main/scala/TopCakes.scala
View File

@@ -1,4 +1,4 @@
package example
package chipyard
import chisel3._

2
generators/firechip/src/main/scala/Generator.scala
View File

@@ -20,7 +20,7 @@ import firesim.util.{GeneratorArgs, HasTargetAgnosticUtilites, HasFireSimGenerat
import scala.util.Try
import utilities.TestSuiteHelper
import chipyard.TestSuiteHelper
trait HasTestSuites {
def addTestSuites(targetName: String, params: Parameters) {

2
generators/firechip/src/main/scala/TargetConfigs.scala
View File

@@ -114,6 +114,7 @@ class L2SingleBank512K extends freechips.rocketchip.subsystem.WithInclusiveCache
* determine which driver to build.
*******************************************************************************/
class FireSimRocketChipConfig extends Config(
new chipyard.WithNoGPIO ++
new WithBootROM ++
new WithPeripheryBusFrequency(BigInt(3200000000L)) ++
new WithExtMemSize(0x400000000L) ++ // 16GB
@@ -172,6 +173,7 @@ class FireSimRocketChipSha3L2PrintfConfig extends Config(
new FireSimRocketChipConfig)
class FireSimBoomConfig extends Config(
new chipyard.WithNoGPIO ++
new WithBootROM ++
new WithPeripheryBusFrequency(BigInt(3200000000L)) ++
new WithExtMemSize(0x400000000L) ++ // 16GB

2
generators/firechip/src/main/scala/TargetMixins.scala
View File

@@ -51,7 +51,7 @@ trait HasTraceIOImp extends LazyModuleImp {
}
trait CanHaveMultiCycleRegfileImp {
val outer: utilities.HasBoomAndRocketTiles
val outer: chipyard.HasBoomAndRocketTiles
outer.tiles.map {
case r: RocketTile => {

44
generators/firechip/src/main/scala/Targets.scala
View File

@@ -12,7 +12,6 @@ import freechips.rocketchip.util.{HeterogeneousBag}
import freechips.rocketchip.amba.axi4.AXI4Bundle
import freechips.rocketchip.config.{Field, Parameters}
import freechips.rocketchip.diplomacy.LazyModule
import utilities.{Subsystem, SubsystemModuleImp}
import icenet._
import firesim.util.DefaultFireSimHarness
import testchipip._
@@ -38,53 +37,20 @@ import FireSimValName._
* determine which driver to build.
*******************************************************************************/
class FireSimDUT(implicit p: Parameters) extends Subsystem
with HasHierarchicalBusTopology
with CanHaveMasterAXI4MemPort
with HasPeripheryBootROM
with CanHavePeripherySerial
with HasPeripheryUART
with CanHavePeripheryIceNIC
with CanHavePeripheryBlockDevice
class FireSimDUT(implicit p: Parameters) extends chipyard.Top
with HasTraceIO
{
override lazy val module = new FireSimModuleImp(this)
}
class FireSimModuleImp[+L <: FireSimDUT](l: L) extends SubsystemModuleImp(l)
with HasRTCModuleImp
with CanHaveMasterAXI4MemPortModuleImp
with HasPeripheryBootROMModuleImp
with CanHavePeripherySerialModuleImp
with HasPeripheryUARTModuleImp
with HasPeripheryIceNICModuleImpValidOnly
with CanHavePeripheryBlockDeviceModuleImp
class FireSimModuleImp[+L <: FireSimDUT](l: L) extends chipyard.TopModule(l)
with HasTraceIOImp
with CanHaveMultiCycleRegfileImp
class FireSim(implicit p: Parameters) extends DefaultFireSimHarness(() => new FireSimDUT)
class FireSimNoNICDUT(implicit p: Parameters) extends Subsystem
with HasHierarchicalBusTopology
with CanHaveMasterAXI4MemPort
with HasPeripheryBootROM
with CanHavePeripherySerial
with HasPeripheryUART
with CanHavePeripheryBlockDevice
with HasTraceIO
{
override lazy val module = new FireSimNoNICModuleImp(this)
}
class FireSimNoNICModuleImp[+L <: FireSimNoNICDUT](l: L) extends SubsystemModuleImp(l)
with HasRTCModuleImp
with CanHaveMasterAXI4MemPortModuleImp
with HasPeripheryBootROMModuleImp
with CanHavePeripherySerialModuleImp
with HasPeripheryUARTModuleImp
with CanHavePeripheryBlockDeviceModuleImp
with HasTraceIOImp
with CanHaveMultiCycleRegfileImp
// Kept for legacy-reasons, this is equivalent to FireSimDUT
class FireSimNoNICDUT(implicit p: Parameters) extends FireSimDUT
class FireSimNoNIC(implicit p: Parameters) extends DefaultFireSimHarness(() => new FireSimNoNICDUT)
@@ -107,7 +73,7 @@ class FireSimSupernode(implicit p: Parameters) extends DefaultFireSimHarness(()
// Verilog blackbox integration demo
class FireSimVerilogGCDDUT(implicit p: Parameters) extends FireSimDUT
with example.CanHavePeripheryGCD
with chipyard.CanHavePeripheryGCD
{
override lazy val module = new FireSimVerilogGCDModuleImp(this)
}

6
variables.mk
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@@ -25,10 +25,10 @@
# - make it so that you only change 1 param to change most or all of them!
# - mainly intended for quick developer setup for common flags
#########################################################################################
SUB_PROJECT ?= example
SUB_PROJECT ?= chipyard
ifeq ($(SUB_PROJECT),example)
SBT_PROJECT ?= example
ifeq ($(SUB_PROJECT),chipyard)
SBT_PROJECT ?= chipyard
MODEL ?= TestHarness
VLOG_MODEL ?= TestHarness
MODEL_PACKAGE ?= $(SBT_PROJECT)