wu-arch/chipyard
1
0
Fork 0
Code Issues Pull Requests Actions 1 Packages Projects Releases Wiki Activity
1,646 Commits 2 Branches 0 Tags
3ba19bb1a0cbdecf67ee6f70fdfd715d3314ea08
Commit Graph

40 Commits

Author SHA1 Message Date
abejgonzalez
a2ebbee2ac Rename Ariane to CVA6 2020-11-04 15:42:30 -08:00
abejgonzalez
06747e6cff Dedup simulation flags 2020-08-21 17:27:50 -07:00
abejgonzalez
2168813da0 Add help string | Fix emulator CC to not conflict with --vpi 2020-08-21 14:07:32 -07:00
abejgonzalez
446631543b Use TRACING_OPTS in debug Verilator 2020-08-21 11:20:45 -07:00
abejgonzalez
425b8ce850 Add support for multi-threaded verilator 2020-08-20 23:37:17 -07:00
abejgonzalez
fdda4cf8f5 Update the cfuncs split 2020-08-20 16:21:39 -07:00
abejgonzalez
435bfac45e Fix NVDLA/Ariane builds 2020-08-20 16:10:14 -07:00
abejgonzalez
9d3c14034d Revert Verilator external IP flags 2020-08-20 10:40:21 -07:00
abejgonzalez
e5158cbe4c Rename some variables 2020-08-19 22:32:47 -07:00
Abraham Gonzalez
b7d9472b4a Cleanup help commands 2020-08-19 22:10:18 -07:00
abejgonzalez
de4e311dd3 Remove extra CMODE flags 2020-08-19 11:21:35 -07:00
Abraham Gonzalez
3b991f3ed7 Move vcs flags to vcs.mk | Misc. cleanup 2020-08-18 11:14:01 -07:00
Abraham Gonzalez
4e7b9d195f Dedup default simulation rules 2020-08-18 10:45:11 -07:00
Abraham Gonzalez
b007d79820 Add help section to makefiles + Reorganize 2020-08-17 20:28:05 -07:00
Jerry Zhao
b719919934 Add RANDOM_SEED variable to set random init for VCS and Verilator simulations 2020-07-20 18:25:18 -07:00
Jerry Zhao
71f340a0af Use output_dir for run-binary logs and waveforms (#596) 
* Dump run-binary files in output/$(long_name) instead of current directory
* Remove run-none rules, these were equivalent to run-binary BINARY=none
 2020-06-12 10:08:55 -07:00
Colin Schmidt
171b805d0e Allow dramsim_ini folder to be set at the command line 2020-06-05 16:55:13 -07:00
Colin Schmidt
a7119fb5ed Hoist permissive settings out of inner makefiles 2020-05-24 10:31:24 -07:00
Colin Schmidt
29664cdf6a Upgrade verilator to support permissive args in the same way as vcs 
It previously only supported them as the last argument.
Supporting them in this case would have removed some of
the DRY code that is able to handle both simulators.
 2020-05-24 09:29:22 -07:00
Abraham Gonzalez
85b555dbce NVDLA Integration + Cleanup Ariane Preprocessing (#505) 
* [nvdla] initial nvdla integration

* [nvdla] add firesim configs

* [nvdla] re-add accidentally deleted line

* [nvdla] works on master with small

* [nvdla] use master branch of nvdla

* [nvdla] remove extra sources

* [nvdla] bump

* [nvdla + ariane] bump and use insert-includes for pre-processing

* [nvdla] add ci | remove target configs in FireChip | update naming

* [nvdla] bump nvdla | fix ci run-tests error

* [nvdla] re-enable PCWM-L error | fix/update makefile(s)

* [nvdla] bump nvdla fragments in FireChip

* [misc] bump tutorial patches

* [chipyard] remove extra import

* [nvdla] bump nvdla for pbus [ci skip]

* [nvdla] update firemarshal and add nvdla workload

* [nvdla] bump nvdla-workload

* [nvdla] bump hw

* [docs] add basic documentation

* [docs] adjustments to documentation

* [misc] update docs | bump firesim with recipe

* [misc] disable error on warnings in verilator | bump number width to match RC

* [docs] fix doc build error

* [verilator] move no fail on warning to be global

* [ci skip] [nvdla] bump submodule urls

* [misc] move firesim specific configs into nvdla dir [ci skip]

* [nvdla] fix run-tests in ci

* update RC configs | bump marshal | bump nvdla-workload

* [nvdla] bump nvdla-workload [ci skip]

* add topology mixin to nvdla configs

* update tutorial patches
 2020-05-16 12:22:30 -07:00
Albert Magyar
2a6bd3bd5c Bump verilator to v4.034 (#547) 
* Bump verilator to v4.034
* Add new flags to verilator makefile
* Conditionally set timescale flag based on Verilator version
 2020-05-11 23:02:37 -07:00
Howard Mao
a905dbedcc add make rules for running simulator without executable 2020-04-28 10:32:28 -07:00
Tynan McAuley
24b63c9577 Fix bug in verilator Makefile for 'debug' rule (#513) 
The 'debug' rule is currently cleaning out the non-debug-model directory
rather than the debug-model directory. This commit fixes that, and
changes both the debug and non-debug rules to use the variables defined
for referring to these two model directories.

Co-authored-by: Tynan McAuley <tynan@galois.com>
 2020-04-15 20:35:56 -07:00
Abraham Gonzalez
3d253c0f67 [make] split up specific make vars/targets into frags (#499) 
* [make] split up specific make vars/targets into frags

* [make] move dramsim and max-cycles into SIM_FLAGS

* [misc] move ariane configs to configs/ folder
 2020-03-30 17:04:45 -07:00
Abraham Gonzalez
d0bec3fba7 Ariane Integration (#448) 
* [ariane/make] integrate ariane | have verilator be installed on path not in makefile

* [misc] warn on verilator not found | search for v files | cleanup build.sbt + .gitignore

* [firesim] bump

* [ci] add midas ariane tests

* [docker/ci] use new docker-image with verilator | re-elab on v changes for ariane | address comments

* [ci] remove references to local verilator install

* [verilator] update flags

* [verilator] minimal set of flags for ariane

* [ariane] bump ariane to master

* [ci] revert to 4.016 verilator

* [ci] install verilator to ci server | misc compile fixes

* [ci/make] add longer ci timeout | update when assert is added in verilator sim

* [firesim] bump for misc. updates

* [make/ci] cleanup makefile and remove firesim tests of it

* [docs/firesim] bump and clean docs

* [firesim] bump

* [ci] use remote verilator for midas tests

* [misc] cleanup built.sbt more

* [firesim] bump

* [misc] bump build.sbt patch for tutorials

* [firesim/ci] cleanup and bump firesim
 2020-03-09 18:06:41 -07:00
Howard Mao
24fe57d447 use blackboxed SimDRAM instead of SimAXIMem 2020-03-02 20:49:20 -08:00
Jerry Zhao
5d27ac5bbc [sim] Pipe /dev/null to simulators to fix VCS messing up stdout (#417) 2020-01-30 10:08:53 -08:00
abejgonzalez
8f2c5d4796 add *.log files whenever a binary is run 2019-10-14 20:55:40 -07:00
Jerry Zhao
ce94ca7840 Fix Makefile .vpd rules not generating .out 2019-09-13 01:52:23 -07:00
abejgonzalez
f34a6fc523 reallow you to do -j for make | parallel ci runs 2019-08-30 23:14:33 -07:00
Jerry Zhao
d363ad5a46 Fix tabs vs spaces in sims/verilator/Makefile 2019-08-29 23:04:06 -07:00
Jerry Zhao
71b3d7e1e6 Force verilator to produce fragmented cpp files 2019-08-29 18:50:43 -07:00
Howard Mao
ed85e71c79 fix the way header files are handled by makefiles 2019-08-22 07:39:33 +08:00
Colin Schmidt
520de19f86 Make waveforms precious (#204) 
* Make waveforms precious
* Fix typo in run-binary-debug
 2019-08-16 11:06:10 -07:00
abejgonzalez
5cedeea352 model verilator args after vcs make 2019-07-17 11:45:32 -07:00
abejgonzalez
b7bc96b6d6 rename missing vcs/verilator names | fix ci path 2019-07-16 21:36:36 -07:00
abejgonzalez
b0b4078801 rename files | only remove .h on blackbox files 2019-07-16 18:55:44 -07:00
abejgonzalez
27641bdffc Merge remote-tracking branch 'origin/dev' into filter-c-files 2019-07-16 16:56:58 -07:00
abejgonzalez
01f21900fe Merge remote-tracking branch 'origin/dev' into cleanup 2019-07-16 10:43:28 -07:00
abejgonzalez
fd5a00a0ab rename sim dirs | add "fast" helper target | re-add -q flag 2019-07-15 16:51:17 -07:00