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Fix NoC configs

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This commit is contained in:
Jerry Zhao
2024-04-12 10:05:11 -07:00
parent 766ea735ac
commit feb2cf5b4e
1 changed files with 6 additions and 4 deletions
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10
generators/chipyard/src/main/scala/config/NoCConfigs.scala
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@@ -240,7 +240,7 @@ class SbusMeshNoCConfig extends Config(
"Core 9 " -> 13,
"Core 10 " -> 14,
"Core 11 " -> 15,
"serial-tl" -> 0),
"serial_tl" -> 0),
outNodeMapping = ListMap(
"system[0]" -> 5,
"system[1]" -> 6,
@@ -251,14 +251,16 @@ class SbusMeshNoCConfig extends Config(
topology = Mesh2D(4, 4),
channelParamGen = (a, b) => UserChannelParams(Seq.fill(3) { UserVirtualChannelParams(3) }, unifiedBuffer = false),
routerParams = (i) => UserRouterParams(combineRCVA=true, combineSAST=true),
routingRelation = NonblockingVirtualSubnetworksRouting(Mesh2DDimensionOrderedRouting(), 3, 1)),
routingRelation = NonblockingVirtualSubnetworksRouting(Mesh2DDimensionOrderedRouting(), 3, 1),
),
beNoCParams = NoCParams(
topology = Mesh2D(4, 4),
channelParamGen = (a, b) => UserChannelParams(Seq.fill(2) { UserVirtualChannelParams(3) }, unifiedBuffer = false),
routerParams = (i) => UserRouterParams(combineRCVA=true, combineSAST=true),
routingRelation = NonblockingVirtualSubnetworksRouting(Mesh2DDimensionOrderedRouting(), 2, 1)),
routingRelation = NonblockingVirtualSubnetworksRouting(Mesh2DDimensionOrderedRouting(), 2, 1),
),
beDivision = 4
)) ++
), inlineNoC = true) ++
new freechips.rocketchip.subsystem.WithNBigCores(12) ++
new freechips.rocketchip.subsystem.WithNBanks(4) ++
new chipyard.config.WithSystemBusWidth(128) ++