Fix small documentation errors

This commit is contained in:
Abraham Gonzalez
2020-12-28 10:50:10 -07:00
parent cb488b8137
commit fbb8ad3e61
3 changed files with 6 additions and 6 deletions

View File

@@ -1,8 +1,8 @@
Running a Design on VCU118
==========================
Basic Design
------------
Basic VCU118 Design
-------------------
The default Xilinx VCU118 harness is setup to have UART, a SPI SDCard, and DDR backing memory.
This allows it to run RISC-V Linux from an SDCard while piping the terminal over UART to the host machine (the machine connected to the VCU118).
@@ -52,4 +52,4 @@ This example extends the default test harness and creates new ``Overlays`` to co
.. Note:: Remember that since whenever a new test harness is created (or the config changes, or the config packages changes, or...), you need to modify the make invocation.
For example, ``make SUB_PROJECT=vcu118 CONFIG=MyNewVCU118Config CONFIG_PACKAGE=this.is.my.scala.package bitstream``.
See :ref:`Making a Bitstream` for information on the various make variables.
See :ref:`Generating a Bitstream` for information on the various make variables.