Fix small documentation errors
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@@ -1,8 +1,8 @@
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Running a Design on VCU118
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==========================
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Basic Design
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------------
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Basic VCU118 Design
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-------------------
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The default Xilinx VCU118 harness is setup to have UART, a SPI SDCard, and DDR backing memory.
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This allows it to run RISC-V Linux from an SDCard while piping the terminal over UART to the host machine (the machine connected to the VCU118).
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@@ -52,4 +52,4 @@ This example extends the default test harness and creates new ``Overlays`` to co
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.. Note:: Remember that since whenever a new test harness is created (or the config changes, or the config packages changes, or...), you need to modify the make invocation.
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For example, ``make SUB_PROJECT=vcu118 CONFIG=MyNewVCU118Config CONFIG_PACKAGE=this.is.my.scala.package bitstream``.
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See :ref:`Making a Bitstream` for information on the various make variables.
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See :ref:`Generating a Bitstream` for information on the various make variables.
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