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Merge pull request #1348 from ucb-bar/vlsi-makefile-fix-1

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Fix VLSI input files list emission to avoid bash "too many arguments" error
This commit is contained in:
Sagar Karandikar
2023-02-15 20:51:01 -08:00
committed by GitHub
parent df903f0cb6 97f576da2a
commit f77bb36510
3 changed files with 3 additions and 3 deletions
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2
vlsi/Makefile
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@@ -122,7 +122,7 @@ $(SYN_CONF): $(VLSI_RTL)
echo "synthesis.inputs:" >> $@ echo "synthesis.inputs:" >> $@
echo " top_module: $(VLSI_TOP)" >> $@ echo " top_module: $(VLSI_TOP)" >> $@
echo " input_files:" >> $@ echo " input_files:" >> $@
for x in $(shell cat $(VLSI_RTL)); do \ for x in $$(cat $(VLSI_RTL)); do \
echo ' - "'$$x'"' >> $@; \ echo ' - "'$$x'"' >> $@; \
done done

2
vlsi/power.mk
View File

@@ -30,7 +30,7 @@ $(POWER_RTL_CONF): $(VLSI_RTL)
echo "power.inputs:" >> $@ echo "power.inputs:" >> $@
echo " level: rtl" >> $@ echo " level: rtl" >> $@
echo " input_files:" >> $@ echo " input_files:" >> $@
for x in $(shell cat $(VLSI_RTL)); do \ for x in $$(cat $(VLSI_RTL)); do \
echo ' - "'$$x'"' >> $@; \ echo ' - "'$$x'"' >> $@; \
done done

2
vlsi/sim.mk
View File

@@ -10,7 +10,7 @@ $(SIM_CONF): $(sim_common_files)
echo " top_module: $(VLSI_TOP)" >> $@ echo " top_module: $(VLSI_TOP)" >> $@
echo " tb_name: ''" >> $@ # don't specify -top echo " tb_name: ''" >> $@ # don't specify -top
echo " input_files:" >> $@ echo " input_files:" >> $@
for x in $(shell cat $(sim_common_files)); do \ for x in $$(cat $(sim_common_files)); do \
echo ' - "'$$x'"' >> $@; \ echo ' - "'$$x'"' >> $@; \
done done
echo " input_files_meta: 'append'" >> $@ echo " input_files_meta: 'append'" >> $@