Merge remote-tracking branch 'origin/dev' into offchip-axi-setup
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@@ -20,7 +20,7 @@ import testchipip._
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import tracegen.{TraceGenSystem}
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import tracegen.{TraceGenSystem}
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import hwacha.{Hwacha}
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import hwacha.{Hwacha}
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import gemmini.{Gemmini, GemminiConfigs}
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import gemmini._
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import boom.common.{BoomTileAttachParams}
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import boom.common.{BoomTileAttachParams}
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import cva6.{CVA6TileAttachParams}
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import cva6.{CVA6TileAttachParams}
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@@ -83,6 +83,17 @@ class WithMultiRoCC extends Config((site, here, up) => {
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case BuildRoCC => site(MultiRoCCKey).getOrElse(site(TileKey).hartId, Nil)
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case BuildRoCC => site(MultiRoCCKey).getOrElse(site(TileKey).hartId, Nil)
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})
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})
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/**
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* Assigns what was previously in the BuildRoCC key to specific harts with MultiRoCCKey
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* Must be paired with WithMultiRoCC
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*/
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class WithMultiRoCCFromBuildRoCC(harts: Int*) extends Config((site, here, up) => {
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case BuildRoCC => Nil
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case MultiRoCCKey => up(MultiRoCCKey, site) ++ harts.distinct.map { i =>
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(i -> up(BuildRoCC, site))
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}
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})
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/**
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/**
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* Config fragment to add Hwachas to cores based on hart
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* Config fragment to add Hwachas to cores based on hart
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*
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*
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@@ -108,11 +119,12 @@ class WithMultiRoCCHwacha(harts: Int*) extends Config(
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})
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})
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)
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)
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class WithMultiRoCCGemmini(harts: Int*) extends Config((site, here, up) => {
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class WithMultiRoCCGemmini[T <: Data : Arithmetic, U <: Data, V <: Data](
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harts: Int*)(gemminiConfig: GemminiArrayConfig[T,U,V] = GemminiConfigs.defaultConfig) extends Config((site, here, up) => {
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case MultiRoCCKey => up(MultiRoCCKey, site) ++ harts.distinct.map { i =>
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case MultiRoCCKey => up(MultiRoCCKey, site) ++ harts.distinct.map { i =>
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(i -> Seq((p: Parameters) => {
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(i -> Seq((p: Parameters) => {
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implicit val q = p
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implicit val q = p
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val gemmini = LazyModule(new Gemmini(OpcodeSet.custom3, GemminiConfigs.defaultConfig))
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val gemmini = LazyModule(new Gemmini(gemminiConfig))
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gemmini
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gemmini
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}))
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}))
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}
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}
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Submodule generators/gemmini updated: 1a6ed24387...9a92fa07e7
Submodule toolchains/esp-tools/riscv-isa-sim updated: a4ed25a96f...86265d02e8
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