changes for new rocket-chip
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Submodule rocket-chip updated: 86a1953287...8799508b1f
@@ -3,8 +3,8 @@ package example
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import chisel3._
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import chisel3._
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import freechips.rocketchip.config.{Parameters, Config}
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import freechips.rocketchip.config.{Parameters, Config}
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import freechips.rocketchip.coreplex.{WithRoccExample, WithNMemoryChannels, WithNBigCores, WithRV32}
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import freechips.rocketchip.coreplex.{WithRoccExample, WithNMemoryChannels, WithNBigCores, WithRV32}
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import freechips.rocketchip.diplomacy.{LazyModule, ValName}
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import freechips.rocketchip.devices.tilelink.BootROMParams
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import freechips.rocketchip.devices.tilelink.BootROMParams
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import freechips.rocketchip.diplomacy.LazyModule
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import freechips.rocketchip.tile.XLen
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import freechips.rocketchip.tile.XLen
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import testchipip._
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import testchipip._
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@@ -13,9 +13,15 @@ class WithBootROM extends Config((site, here, up) => {
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contentFileName = s"./bootrom/bootrom.rv${site(XLen)}.img")
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contentFileName = s"./bootrom/bootrom.rv${site(XLen)}.img")
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})
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})
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object ConfigValName {
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implicit val valName = ValName("TestHarness")
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}
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import ConfigValName._
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class WithExampleTop extends Config((site, here, up) => {
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class WithExampleTop extends Config((site, here, up) => {
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case BuildTop => (clock: Clock, reset: Bool, p: Parameters) =>
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case BuildTop => (clock: Clock, reset: Bool, p: Parameters) => {
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Module(LazyModule(new ExampleTop()(p)).module)
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Module(LazyModule(new ExampleTop()(p)).module)
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}
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})
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})
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class WithPWM extends Config((site, here, up) => {
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class WithPWM extends Config((site, here, up) => {
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@@ -13,7 +13,10 @@ class TestHarness(implicit val p: Parameters) extends Module {
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})
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})
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val dut = p(BuildTop)(clock, reset.toBool, p)
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val dut = p(BuildTop)(clock, reset.toBool, p)
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dut.debug := DontCare
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dut.connectSimAXIMem()
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dut.connectSimAXIMem()
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dut.dontTouchPorts()
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dut.tieOffInterrupts()
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io.success := dut.connectSimSerial()
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io.success := dut.connectSimSerial()
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}
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}
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@@ -4,12 +4,14 @@ import chisel3._
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import freechips.rocketchip.coreplex._
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import freechips.rocketchip.coreplex._
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import freechips.rocketchip.config.Parameters
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import freechips.rocketchip.config.Parameters
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import freechips.rocketchip.devices.tilelink._
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import freechips.rocketchip.devices.tilelink._
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import freechips.rocketchip.util.DontTouch
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import testchipip._
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import testchipip._
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class ExampleTop(implicit p: Parameters) extends RocketCoreplex
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class ExampleTop(implicit p: Parameters) extends RocketCoreplex
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with HasMasterAXI4MemPort
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with HasMasterAXI4MemPort
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with HasPeripheryBootROM
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with HasPeripheryBootROM
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with HasSystemErrorSlave
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with HasSystemErrorSlave
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with HasSyncExtInterrupts
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with HasNoDebug
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with HasNoDebug
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with HasPeripherySerial {
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with HasPeripherySerial {
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override lazy val module = new ExampleTopModule(this)
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override lazy val module = new ExampleTopModule(this)
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@@ -19,8 +21,10 @@ class ExampleTopModule[+L <: ExampleTop](l: L) extends RocketCoreplexModule(l)
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with HasRTCModuleImp
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with HasRTCModuleImp
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with HasMasterAXI4MemPortModuleImp
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with HasMasterAXI4MemPortModuleImp
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with HasPeripheryBootROMModuleImp
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with HasPeripheryBootROMModuleImp
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with HasExtInterruptsModuleImp
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with HasNoDebugModuleImp
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with HasNoDebugModuleImp
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with HasPeripherySerialModuleImp
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with HasPeripherySerialModuleImp
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with DontTouch
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class ExampleTopWithPWM(implicit p: Parameters) extends ExampleTop
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class ExampleTopWithPWM(implicit p: Parameters) extends ExampleTop
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with HasPeripheryPWM {
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with HasPeripheryPWM {
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Submodule testchipip updated: 3fe8806890...749311fd91
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