changes for new rocket-chip

This commit is contained in:
Donggyu Kim
2018-01-15 12:58:46 -08:00
committed by Howard Mao
parent 269660bbfe
commit ed13397967
5 changed files with 17 additions and 4 deletions

View File

@@ -4,12 +4,14 @@ import chisel3._
import freechips.rocketchip.coreplex._
import freechips.rocketchip.config.Parameters
import freechips.rocketchip.devices.tilelink._
import freechips.rocketchip.util.DontTouch
import testchipip._
class ExampleTop(implicit p: Parameters) extends RocketCoreplex
with HasMasterAXI4MemPort
with HasPeripheryBootROM
with HasSystemErrorSlave
with HasSyncExtInterrupts
with HasNoDebug
with HasPeripherySerial {
override lazy val module = new ExampleTopModule(this)
@@ -19,8 +21,10 @@ class ExampleTopModule[+L <: ExampleTop](l: L) extends RocketCoreplexModule(l)
with HasRTCModuleImp
with HasMasterAXI4MemPortModuleImp
with HasPeripheryBootROMModuleImp
with HasExtInterruptsModuleImp
with HasNoDebugModuleImp
with HasPeripherySerialModuleImp
with DontTouch
class ExampleTopWithPWM(implicit p: Parameters) extends ExampleTop
with HasPeripheryPWM {