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get RV32 working

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This commit is contained in:
Howard Mao
2017-11-03 18:00:27 -07:00
parent 52068497c4
commit e4a4046375
6 changed files with 24 additions and 8 deletions
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13
src/main/scala/example/Configs.scala
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@@ -2,10 +2,17 @@ package example
import chisel3._
import freechips.rocketchip.config.{Parameters, Config}
import freechips.rocketchip.coreplex.{WithRoccExample, WithNMemoryChannels, WithNBigCores}
import freechips.rocketchip.coreplex.{WithRoccExample, WithNMemoryChannels, WithNBigCores, WithRV32}
import freechips.rocketchip.devices.tilelink.BootROMParams
import freechips.rocketchip.diplomacy.LazyModule
import freechips.rocketchip.tile.XLen
import testchipip._
class WithBootROM extends Config((site, here, up) => {
case BootROMParams => BootROMParams(
contentFileName = s"./bootrom/bootrom.rv${site(XLen)}.img")
})
class WithExampleTop extends Config((site, here, up) => {
case BuildTop => (clock: Clock, reset: Bool, p: Parameters) =>
Module(LazyModule(new ExampleTop()(p)).module)
@@ -33,6 +40,7 @@ class WithSimBlockDevice extends Config((site, here, up) => {
})
class BaseExampleConfig extends Config(
new WithBootROM ++
new freechips.rocketchip.system.DefaultConfig)
class DefaultExampleConfig extends Config(
@@ -58,3 +66,6 @@ class WithFourMemChannels extends WithNMemoryChannels(4)
class DualCoreConfig extends Config(
// Core gets tacked onto existing list
new WithNBigCores(1) ++ new DefaultExampleConfig)
class RV32ExampleConfig extends Config(
new WithRV32 ++ new DefaultExampleConfig)