bump rocket-chip to enable large memory spaces (#76)

* bump rocket-chip to enable large memory spaces

* Tests pass with write mask bug fix

* fix verisim build

* Update to point to rocket-chip on master

* bump rocket-chip and barstools

This fixes the analog chisel bug and
incorporates the firrtl MDF support (h/t John Wright)
This commit is contained in:
Colin Schmidt
2019-05-14 10:22:31 -07:00
committed by GitHub
parent 00d8e04d93
commit e007b49179
7 changed files with 116 additions and 9 deletions

View File

@@ -31,6 +31,7 @@ rocketchip_vsrc_dir = $(ROCKETCHIP_DIR)/src/main/resources/vsrc
sim_vsrcs = \
$(VERILOG_FILE) \
$(HARNESS_FILE) \
$(HARNESS_SMEMS_FILE) \
$(SMEMS_FILE)
model_dir = $(build_dir)/$(long_name)
@@ -82,5 +83,5 @@ run-regression-tests-fast: $(addprefix $(output_dir)/,$(addsuffix .run,$(regress
run-regression-tests-debug: $(addprefix $(output_dir)/,$(addsuffix .vpd,$(regression-tests)))
clean: clean-scala
clean:
rm -rf generated-src ./simulator-*