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Merge pull request #1908 from ucb-bar/clkgrp_err

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Jerry Zhao
2024-06-24 09:32:15 -07:00
committed by GitHub
parent d5ced1e11d d529844a9d
commit d5b00ad1f4
1 changed files with 2 additions and 1 deletions
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generators/chipyard/src/main/scala/clocking/ClockGroupCombiner.scala
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@@ -48,9 +48,10 @@ class ClockGroupCombiner(implicit p: Parameters, v: ValName) extends LazyModule
val name = combiners(i)._1
i = i + 1
require(g.size >= 1)
val names = g.map(_.name.getOrElse("unamed"))
val takes = g.map(_.take).flatten
require(takes.distinct.size <= 1,
s"Clock group $name has non-homogeneous requested ClockParameters $takes")
s"Clock group $name has non-homogeneous requested ClockParameters ${names.zip(takes)}")
require(takes.size > 0,
s"Clock group $name has no inheritable frequencies")
(grouped ++ Seq(ClockSinkParameters(take = takes.headOption, name = Some(name))), r)