Update project-template for testchipip master

This commit is contained in:
Edward Wang
2018-11-01 14:13:38 -07:00
committed by edwardcwang
parent cd82131748
commit d48587b671
3 changed files with 4 additions and 3 deletions

View File

@@ -3,7 +3,7 @@ package example
import chisel3._
import freechips.rocketchip.diplomacy.LazyModule
import freechips.rocketchip.config.{Field, Parameters}
import testchipip.GeneratorApp
import freechips.rocketchip.util.GeneratorApp
case object BuildTop extends Field[(Clock, Bool, Parameters) => ExampleTopModule[ExampleTop]]
@@ -21,6 +21,7 @@ class TestHarness(implicit val p: Parameters) extends Module {
}
object Generator extends GeneratorApp {
val longName = names.topModuleProject + "." + names.topModuleClass + "." + names.configs
generateFirrtl
generateAnno
}