Small cleanup to CY DigitalTop | Move E300 configs to unique folder

This commit is contained in:
abejgonzalez
2020-09-07 15:26:30 -07:00
parent a8083aa570
commit c49eef3224
5 changed files with 39 additions and 11 deletions

View File

@@ -23,7 +23,7 @@ MODEL := ArtyFPGATestHarness
VLOG_MODEL := ArtyFPGATestHarness VLOG_MODEL := ArtyFPGATestHarness
MODEL_PACKAGE := chipyard.fpga.arty MODEL_PACKAGE := chipyard.fpga.arty
CONFIG := E300ArtyDevKitConfig CONFIG := E300ArtyDevKitConfig
CONFIG_PACKAGE := chipyard.fpga.arty CONFIG_PACKAGE := chipyard.fpga.arty.e300
GENERATOR_PACKAGE := chipyard GENERATOR_PACKAGE := chipyard
TB := none # unused TB := none # unused
TOP := ChipTop TOP := ChipTop

View File

@@ -1,5 +1,5 @@
// See LICENSE for license details. // See LICENSE for license details.
package chipyard.fpga.arty package chipyard.fpga.arty.e300
import freechips.rocketchip.config._ import freechips.rocketchip.config._
import freechips.rocketchip.subsystem._ import freechips.rocketchip.subsystem._
@@ -16,6 +16,8 @@ import sifive.blocks.devices.spi._
import sifive.blocks.devices.uart._ import sifive.blocks.devices.uart._
import sifive.blocks.devices.i2c._ import sifive.blocks.devices.i2c._
import chipyard.{BuildSystem}
class E300DevKitExtra extends Config((site, here, up) => { class E300DevKitExtra extends Config((site, here, up) => {
case PeripheryGPIOKey => List( case PeripheryGPIOKey => List(
GPIOParams(address = 0x10012000, width = 32, includeIOF = true)) GPIOParams(address = 0x10012000, width = 32, includeIOF = true))
@@ -46,7 +48,12 @@ class E300DevKitExtra extends Config((site, here, up) => {
debugIdleCycles = 5) debugIdleCycles = 5)
}) })
class WithE300System extends Config((site, here, up) => {
case BuildSystem => (p: Parameters) => new E300DigitalTop()(p)
})
class E300ArtyDevKitConfig extends Config( class E300ArtyDevKitConfig extends Config(
new WithE300System ++
new WithE300Connections ++ new WithE300Connections ++
new E300DevKitExtra ++ new E300DevKitExtra ++
new chipyard.config.WithBootROM ++ new chipyard.config.WithBootROM ++

View File

@@ -0,0 +1,23 @@
package chipyard.fpga.arty.e300
import chisel3._
import freechips.rocketchip.subsystem._
import freechips.rocketchip.system._
import freechips.rocketchip.config.Parameters
import freechips.rocketchip.devices.tilelink._
import chipyard.{DigitalTop, DigitalTopModule}
// ------------------------------------
// E300 DigitalTop
// ------------------------------------
class E300DigitalTop(implicit p: Parameters) extends DigitalTop
with sifive.blocks.devices.mockaon.HasPeripheryMockAON
{
override lazy val module = new E300DigitalTopModule(this)
}
class E300DigitalTopModule[+L <: E300DigitalTop](l: L) extends DigitalTopModule(l)
with sifive.blocks.devices.mockaon.HasPeripheryMockAONModuleImp

View File

@@ -1,4 +1,4 @@
package chipyard.fpga.arty package chipyard.fpga.arty.e300
import chisel3._ import chisel3._
import chisel3.experimental.{attach, IO} import chisel3.experimental.{attach, IO}

View File

@@ -13,10 +13,6 @@ import freechips.rocketchip.devices.tilelink._
// DOC include start: DigitalTop // DOC include start: DigitalTop
class DigitalTop(implicit p: Parameters) extends ChipyardSystem class DigitalTop(implicit p: Parameters) extends ChipyardSystem
with sifive.blocks.devices.mockaon.HasPeripheryMockAON
with sifive.blocks.devices.spi.HasPeripherySPI
with sifive.blocks.devices.pwm.HasPeripheryPWM
with sifive.blocks.devices.i2c.HasPeripheryI2C
with testchipip.CanHaveTraceIO // Enables optionally adding trace IO with testchipip.CanHaveTraceIO // Enables optionally adding trace IO
with testchipip.CanHaveBackingScratchpad // Enables optionally adding a backing scratchpad with testchipip.CanHaveBackingScratchpad // Enables optionally adding a backing scratchpad
with testchipip.CanHavePeripheryBlockDevice // Enables optionally adding the block device with testchipip.CanHavePeripheryBlockDevice // Enables optionally adding the block device
@@ -24,6 +20,9 @@ class DigitalTop(implicit p: Parameters) extends ChipyardSystem
with sifive.blocks.devices.uart.HasPeripheryUART // Enables optionally adding the sifive UART with sifive.blocks.devices.uart.HasPeripheryUART // Enables optionally adding the sifive UART
with sifive.blocks.devices.gpio.HasPeripheryGPIO // Enables optionally adding the sifive GPIOs with sifive.blocks.devices.gpio.HasPeripheryGPIO // Enables optionally adding the sifive GPIOs
with sifive.blocks.devices.spi.HasPeripherySPIFlash // Enables optionally adding the sifive SPI flash controller with sifive.blocks.devices.spi.HasPeripherySPIFlash // Enables optionally adding the sifive SPI flash controller
with sifive.blocks.devices.spi.HasPeripherySPI // Enables optionally adding the sifive SPI
with sifive.blocks.devices.pwm.HasPeripheryPWM // Enables optionally adding the sifive PWM
with sifive.blocks.devices.i2c.HasPeripheryI2C // Enables optionally adding the sifive I2C
with icenet.CanHavePeripheryIceNIC // Enables optionally adding the IceNIC for FireSim with icenet.CanHavePeripheryIceNIC // Enables optionally adding the IceNIC for FireSim
with chipyard.example.CanHavePeripheryInitZero // Enables optionally adding the initzero example widget with chipyard.example.CanHavePeripheryInitZero // Enables optionally adding the initzero example widget
with chipyard.example.CanHavePeripheryGCD // Enables optionally adding the GCD example widget with chipyard.example.CanHavePeripheryGCD // Enables optionally adding the GCD example widget
@@ -35,16 +34,15 @@ class DigitalTop(implicit p: Parameters) extends ChipyardSystem
} }
class DigitalTopModule[+L <: DigitalTop](l: L) extends ChipyardSystemModule(l) class DigitalTopModule[+L <: DigitalTop](l: L) extends ChipyardSystemModule(l)
with sifive.blocks.devices.mockaon.HasPeripheryMockAONModuleImp
with sifive.blocks.devices.spi.HasPeripherySPIModuleImp
with sifive.blocks.devices.pwm.HasPeripheryPWMModuleImp
with sifive.blocks.devices.i2c.HasPeripheryI2CModuleImp
with testchipip.CanHaveTraceIOModuleImp with testchipip.CanHaveTraceIOModuleImp
with testchipip.CanHavePeripheryBlockDeviceModuleImp with testchipip.CanHavePeripheryBlockDeviceModuleImp
with testchipip.CanHavePeripherySerialModuleImp with testchipip.CanHavePeripherySerialModuleImp
with sifive.blocks.devices.uart.HasPeripheryUARTModuleImp with sifive.blocks.devices.uart.HasPeripheryUARTModuleImp
with sifive.blocks.devices.gpio.HasPeripheryGPIOModuleImp with sifive.blocks.devices.gpio.HasPeripheryGPIOModuleImp
with sifive.blocks.devices.spi.HasPeripherySPIFlashModuleImp with sifive.blocks.devices.spi.HasPeripherySPIFlashModuleImp
with sifive.blocks.devices.spi.HasPeripherySPIModuleImp
with sifive.blocks.devices.pwm.HasPeripheryPWMModuleImp
with sifive.blocks.devices.i2c.HasPeripheryI2CModuleImp
with icenet.CanHavePeripheryIceNICModuleImp with icenet.CanHavePeripheryIceNICModuleImp
with chipyard.example.CanHavePeripheryGCDModuleImp with chipyard.example.CanHavePeripheryGCDModuleImp
with freechips.rocketchip.util.DontTouch with freechips.rocketchip.util.DontTouch