Small cleanup to CY DigitalTop | Move E300 configs to unique folder

fpga/src/main/scala/arty/e300/Configs.scala

@@ -1,5 +1,5 @@
 // See LICENSE for license details.
-package chipyard.fpga.arty
+package chipyard.fpga.arty.e300
 
 import freechips.rocketchip.config._
 import freechips.rocketchip.subsystem._
@@ -16,6 +16,8 @@ import sifive.blocks.devices.spi._
 import sifive.blocks.devices.uart._
 import sifive.blocks.devices.i2c._
 
+import chipyard.{BuildSystem}
+
 class E300DevKitExtra extends Config((site, here, up) => {
   case PeripheryGPIOKey => List(
     GPIOParams(address = 0x10012000, width = 32, includeIOF = true))
@@ -46,7 +48,12 @@ class E300DevKitExtra extends Config((site, here, up) => {
     debugIdleCycles = 5)
 })
 
+class WithE300System extends Config((site, here, up) => {
+  case BuildSystem => (p: Parameters) => new E300DigitalTop()(p)
+})
+
 class E300ArtyDevKitConfig extends Config(
+  new WithE300System ++
   new WithE300Connections ++
   new E300DevKitExtra ++
   new chipyard.config.WithBootROM ++

fpga/src/main/scala/arty/e300/DigitalTop.scala

@@ -0,0 +1,23 @@
+package chipyard.fpga.arty.e300
+
+import chisel3._
+
+import freechips.rocketchip.subsystem._
+import freechips.rocketchip.system._
+import freechips.rocketchip.config.Parameters
+import freechips.rocketchip.devices.tilelink._
+
+import chipyard.{DigitalTop, DigitalTopModule}
+
+// ------------------------------------
+// E300 DigitalTop
+// ------------------------------------
+
+class E300DigitalTop(implicit p: Parameters) extends DigitalTop
+  with sifive.blocks.devices.mockaon.HasPeripheryMockAON
+{
+  override lazy val module = new E300DigitalTopModule(this)
+}
+
+class E300DigitalTopModule[+L <: E300DigitalTop](l: L) extends DigitalTopModule(l)
+  with sifive.blocks.devices.mockaon.HasPeripheryMockAONModuleImp

fpga/src/main/scala/arty/e300/IOBinders.scala

@@ -1,4 +1,4 @@
-package chipyard.fpga.arty
+package chipyard.fpga.arty.e300
 
 import chisel3._
 import chisel3.experimental.{attach, IO}