Update docs

2021-10-05 21:54:52 -07:00
parent f61410c957
commit c0a60f50f9
1 changed files with 1 additions and 0 deletions
--- a/docs/Customization/MMIO-Peripherals.rst
+++ b/docs/Customization/MMIO-Peripherals.rst
@@ -137,6 +137,7 @@ Now with all of that done, we can go ahead and run our simulation.
 .. code-block:: shell

    cd sims/verilator
+    make CONFIG=GCDTLRocketConfig
    make CONFIG=GCDTLRocketConfig BINARY=../../tests/gcd.riscv run-binary