fix rocket core ref
This commit is contained in:
@@ -8,12 +8,13 @@ Generators
|
|||||||
|
|
||||||
The Chipyard Framework currently consists of the following RTL generators:
|
The Chipyard Framework currently consists of the following RTL generators:
|
||||||
|
|
||||||
|
|
||||||
Processor Cores
|
Processor Cores
|
||||||
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
|
||||||
|
|
||||||
**Rocket**
|
**Rocket Core**
|
||||||
An in-order RISC-V core.
|
An in-order RISC-V core.
|
||||||
See :ref:`Rocket` for more information.
|
See :ref:`Rocket Core` for more information.
|
||||||
|
|
||||||
**BOOM (Berkeley Out-of-Order Machine)**
|
**BOOM (Berkeley Out-of-Order Machine)**
|
||||||
An out-of-order RISC-V core.
|
An out-of-order RISC-V core.
|
||||||
|
|||||||
Reference in New Issue
Block a user