From b858c76f0952ac72bf1d57246ee7f6debfe3b9f9 Mon Sep 17 00:00:00 2001
From: alonamid <alonamid@eecs.berkeley.edu>
Date: Wed, 25 Sep 2019 12:28:39 -0700
Subject: [PATCH] fix rocket core ref

---
 docs/Chipyard-Basics/Chipyard-Components.rst | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/docs/Chipyard-Basics/Chipyard-Components.rst b/docs/Chipyard-Basics/Chipyard-Components.rst
index 250beb85..6d54ad94 100644
--- a/docs/Chipyard-Basics/Chipyard-Components.rst
+++ b/docs/Chipyard-Basics/Chipyard-Components.rst
@@ -8,12 +8,13 @@ Generators
 
 The Chipyard Framework currently consists of the following RTL generators:
 
+
 Processor Cores
 ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^
 
-**Rocket**
+**Rocket Core**
   An in-order RISC-V core.
-  See :ref:`Rocket` for more information.
+  See :ref:`Rocket Core` for more information.
 
 **BOOM (Berkeley Out-of-Order Machine)**
   An out-of-order RISC-V core.