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Merge branch 'graphics' of https://github.com/hansungk/chipyard into graphics

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This commit is contained in:
Richard Yan
2024-05-08 15:06:01 -07:00
parent d86f13dbfa 486cde650a
commit b1beb324f1
4 changed files with 5 additions and 3 deletions
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1
common.mk
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@@ -16,6 +16,7 @@ HELP_COMPILATION_VARIABLES += \
" EXTRA_SIM_LDFLAGS = additional LDFLAGS for building simulators" \ " EXTRA_SIM_LDFLAGS = additional LDFLAGS for building simulators" \
" EXTRA_SIM_SOURCES = additional simulation sources needed for simulator" \ " EXTRA_SIM_SOURCES = additional simulation sources needed for simulator" \
" EXTRA_SIM_REQS = additional make requirements to build the simulator" \ " EXTRA_SIM_REQS = additional make requirements to build the simulator" \
" EXTRA_SIM_OUT_NAME = additional suffix appended to the simulation .out log filename" \
" ENABLE_CUSTOM_FIRRTL_PASS = if set, enable custom firrtl passes (SFC lowers to LowFIRRTL & MFC converts to Verilog)" \ " ENABLE_CUSTOM_FIRRTL_PASS = if set, enable custom firrtl passes (SFC lowers to LowFIRRTL & MFC converts to Verilog)" \
" ENABLE_YOSYS_FLOW = if set, add compilation flags to enable the vlsi flow for yosys(tutorial flow)" \ " ENABLE_YOSYS_FLOW = if set, add compilation flags to enable the vlsi flow for yosys(tutorial flow)" \
" EXTRA_CHISEL_OPTIONS = additional options to pass to the Chisel compiler" \ " EXTRA_CHISEL_OPTIONS = additional options to pass to the Chisel compiler" \

2
generators/rocket-gpu

Submodule generators/rocket-gpu updated: 77e740d990...080bfd706b

1
sims/vcs/vcs.mk
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@@ -36,6 +36,7 @@ VCS_CC_OPTS = \
$(filter -l%,$(VCS_LDFLAGS)) $(filter -l%,$(VCS_LDFLAGS))
VCS_NONCC_OPTS = \ VCS_NONCC_OPTS = \
-j36 \
-notice \ -notice \
-line \ -line \
+lint=all,noVCDE,noONGS,noUI,noPCTIO-L,noPCTI-L \ +lint=all,noVCDE,noONGS,noUI,noPCTIO-L,noPCTI-L \

4
sims/verilator/Makefile
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@@ -195,13 +195,13 @@ model_mk_debug = $(model_dir_debug)/V$(TB).mk
$(model_mk): $(sim_common_files) $(EXTRA_SIM_REQS) $(model_mk): $(sim_common_files) $(EXTRA_SIM_REQS)
rm -rf $(model_dir) rm -rf $(model_dir)
mkdir -p $(model_dir) mkdir -p $(model_dir)
$(VERILATOR) $(VERILATOR_OPTS) $(EXTRA_SIM_SOURCES) -o $(sim) -Mdir $(model_dir) $(VERILATOR) -j 36 $(VERILATOR_OPTS) $(EXTRA_SIM_SOURCES) -o $(sim) -Mdir $(model_dir)
touch $@ touch $@
$(model_mk_debug): $(sim_common_files) $(EXTRA_SIM_REQS) $(model_mk_debug): $(sim_common_files) $(EXTRA_SIM_REQS)
rm -rf $(model_dir_debug) rm -rf $(model_dir_debug)
mkdir -p $(model_dir_debug) mkdir -p $(model_dir_debug)
$(VERILATOR) $(VERILATOR_OPTS) +define+DEBUG $(EXTRA_SIM_SOURCES) -o $(sim_debug) $(TRACING_OPTS) -Mdir $(model_dir_debug) $(VERILATOR) -j 36 $(VERILATOR_OPTS) +define+DEBUG $(EXTRA_SIM_SOURCES) -o $(sim_debug) $(TRACING_OPTS) -Mdir $(model_dir_debug)
touch $@ touch $@
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