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Merge branch 'add-disallowPackedArrays' of https://github.com/ucb-bar/chipyard into add-disallowPackedArrays

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This commit is contained in:
Nayiri K
2023-03-08 11:23:16 -08:00
parent 07227bacd1 a4db80c3d3
commit b1acc89d91
9 changed files with 24 additions and 20 deletions
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6
.github/scripts/defaults.sh vendored
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@@ -14,9 +14,6 @@ REMOTE_CHIPYARD_DIR=$GITHUB_WORKSPACE
REMOTE_SIM_DIR=$REMOTE_CHIPYARD_DIR/sims/verilator REMOTE_SIM_DIR=$REMOTE_CHIPYARD_DIR/sims/verilator
REMOTE_FIRESIM_DIR=$REMOTE_CHIPYARD_DIR/sims/firesim/sim REMOTE_FIRESIM_DIR=$REMOTE_CHIPYARD_DIR/sims/firesim/sim
REMOTE_FPGA_DIR=$REMOTE_CHIPYARD_DIR/fpga REMOTE_FPGA_DIR=$REMOTE_CHIPYARD_DIR/fpga
REMOTE_JAVA_OPTS="-Xmx10G -Xss8M"
# Disable the supershell to greatly improve the readability of SBT output when captured by Circle CI
REMOTE_SBT_OPTS="-Dsbt.ivy.home=$REMOTE_WORK_DIR/.ivy2 -Dsbt.supershell=false -Dsbt.global.base=$REMOTE_WORK_DIR/.sbt -Dsbt.boot.directory=$REMOTE_WORK_DIR/.sbt/boot"
# local variables (aka within the docker container) # local variables (aka within the docker container)
LOCAL_CHIPYARD_DIR=$GITHUB_WORKSPACE LOCAL_CHIPYARD_DIR=$GITHUB_WORKSPACE
@@ -26,7 +23,8 @@ LOCAL_FIRESIM_DIR=$LOCAL_CHIPYARD_DIR/sims/firesim/sim
# CI uses temp directories with very long names # CI uses temp directories with very long names
# explicitly force socket creation to use /tmp to avoid name length errors # explicitly force socket creation to use /tmp to avoid name length errors
# https://github.com/sbt/sbt/pull/6887 # https://github.com/sbt/sbt/pull/6887
JAVA_TMP_DIR=$(mktemp -d -t ci-cy-XXXXXXXX) REMOTE_JAVA_TMP_DIR=$(mktemp -d -t ci-cy-XXXXXXXX)
REMOTE_COURSIER_CACHE=$REMOTE_WORK_DIR/.coursier-cache
# key value store to get the build groups # key value store to get the build groups
declare -A grouping declare -A grouping

6
.github/scripts/remote-do-rtl-build.sh vendored
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@@ -52,6 +52,8 @@ read -a keys <<< ${grouping[$1]}
# need to set the PATH to use the new verilator (with the new verilator root) # need to set the PATH to use the new verilator (with the new verilator root)
for key in "${keys[@]}" for key in "${keys[@]}"
do do
export COURSIER_CACHE=$REMOTE_WORK_DIR/.coursier-cache export COURSIER_CACHE=$REMOTE_COURSIER_CACHE
make -j$REMOTE_MAKE_NPROC -C $REMOTE_MAKE_DIR FIRRTL_LOGLEVEL=info JAVA_TMP_DIR=$JAVA_TMP_DIR SBT_OPTS="$REMOTE_SBT_OPTS" ${mapping[$key]} export JVM_MEMORY=10G
export JAVA_TMP_DIR=$REMOTE_JAVA_TMP_DIR
make -j$REMOTE_MAKE_NPROC -C $REMOTE_MAKE_DIR FIRRTL_LOGLEVEL=info ${mapping[$key]}
done done

7
.github/scripts/remote-run-firesim-scala-tests.sh vendored
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@@ -15,6 +15,7 @@ cd $REMOTE_CHIPYARD_DIR
# Run Firesim Scala Tests # Run Firesim Scala Tests
export FIRESIM_ENV_SOURCED=1; export FIRESIM_ENV_SOURCED=1;
export COURSIER_CACHE=$REMOTE_WORK_DIR/.coursier-cache export COURSIER_CACHE=$REMOTE_COURSIER_CACHE
JAVA_TOOL_OPTIONS="$REMOTE_JAVA_OPTS -Djava.io.tmpdir=$(mktemp -d -t cy-fsim-XXXXXXXX)" export JVM_MEMORY=10G
make -C $REMOTE_FIRESIM_DIR JAVA_TOOL_OPTIONS="$JAVA_TOOL_OPTIONS" SBT_OPTS="$REMOTE_SBT_OPTS" TARGET_SBT_PROJECT="{file:$REMOTE_CHIPYARD_DIR}firechip" testOnly ${mapping[$1]} export JAVA_TMP_DIR=$REMOTE_JAVA_TMP_DIR
make -C $REMOTE_FIRESIM_DIR TARGET_SBT_PROJECT="{file:$REMOTE_CHIPYARD_DIR}firechip" testOnly ${mapping[$1]}

1
.github/workflows/chipyard-full-flow.yml vendored
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@@ -78,6 +78,7 @@ jobs:
run: | run: |
cd ${{ env.REMOTE_WORK_DIR }} cd ${{ env.REMOTE_WORK_DIR }}
eval "$(conda shell.bash hook)" eval "$(conda shell.bash hook)"
mkdir ${{ env.JAVA_TMP_DIR }}
export MAKEFLAGS="-j32" export MAKEFLAGS="-j32"
./build-setup.sh -f ./build-setup.sh -f

2
.gitignore vendored
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@@ -24,3 +24,5 @@ first-clone-setup-fast-log
project/.bloop/ project/.bloop/
project/metals.sbt project/metals.sbt
project/project/ project/project/
.ivy2
.sbt

13
common.mk
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@@ -18,7 +18,7 @@ HELP_COMPILATION_VARIABLES += \
" EXTRA_SIM_REQS = additional make requirements to build the simulator" \ " EXTRA_SIM_REQS = additional make requirements to build the simulator" \
" ENABLE_SBT_THIN_CLIENT = if set, use sbt's experimental thin client (works best when overridding SBT_BIN with the mainline sbt script)" \ " ENABLE_SBT_THIN_CLIENT = if set, use sbt's experimental thin client (works best when overridding SBT_BIN with the mainline sbt script)" \
" ENABLE_CUSTOM_FIRRTL_PASS = if set, enable custom firrtl passes (SFC lowers to LowFIRRTL & MFC converts to Verilog)" \ " ENABLE_CUSTOM_FIRRTL_PASS = if set, enable custom firrtl passes (SFC lowers to LowFIRRTL & MFC converts to Verilog)" \
" ENABLE_VLSI_FLOW = if set, add compilation flags to enable the vlsi flow for hammer \ " ENABLE_YOSYS_FLOW = if set, add compilation flags to enable the vlsi flow for yosys(tutorial flow) \
" EXTRA_CHISEL_OPTIONS = additional options to pass to the Chisel compiler" \ " EXTRA_CHISEL_OPTIONS = additional options to pass to the Chisel compiler" \
" EXTRA_FIRRTL_OPTIONS = additional options to pass to the FIRRTL compiler" " EXTRA_FIRRTL_OPTIONS = additional options to pass to the FIRRTL compiler"
@@ -27,7 +27,7 @@ EXTRA_SIM_CXXFLAGS ?=
EXTRA_SIM_LDFLAGS ?= EXTRA_SIM_LDFLAGS ?=
EXTRA_SIM_SOURCES ?= EXTRA_SIM_SOURCES ?=
EXTRA_SIM_REQS ?= EXTRA_SIM_REQS ?=
ENABLE_CUSTOM_FIRRTL_PASS += $(ENABLE_VLSI_FLOW) ENABLE_CUSTOM_FIRRTL_PASS += $(ENABLE_YOSYS_FLOW)
#---------------------------------------------------------------------------- #----------------------------------------------------------------------------
HELP_SIMULATION_VARIABLES += \ HELP_SIMULATION_VARIABLES += \
@@ -182,7 +182,7 @@ else
$(eval SFC_LEVEL := low) $(eval SFC_LEVEL := low)
$(eval EXTRA_FIRRTL_OPTIONS += $(SFC_REPL_SEQ_MEM)) $(eval EXTRA_FIRRTL_OPTIONS += $(SFC_REPL_SEQ_MEM))
endif endif
ifeq (,$(ENABLE_VLSI_FLOW)) ifeq (,$(ENABLE_YOSYS_FLOW))
$(eval MFC_LOWERING_OPTIONS = $(MFC_BASE_LOWERING_OPTIONS)) $(eval MFC_LOWERING_OPTIONS = $(MFC_BASE_LOWERING_OPTIONS))
else else
$(eval MFC_LOWERING_OPTIONS = $(MFC_BASE_LOWERING_OPTIONS),disallowPackedArrays) $(eval MFC_LOWERING_OPTIONS = $(MFC_BASE_LOWERING_OPTIONS),disallowPackedArrays)
@@ -406,10 +406,11 @@ endef
CONFIG_FRAG_LEVELS ?= 3 CONFIG_FRAG_LEVELS ?= 3
.PHONY: find-config-fragments .PHONY: find-config-fragments
find-config-fragments: private IN_F := $(shell mktemp -d -t cy-XXXXXXXX)/scala_files.f
find-config-fragments: $(SCALA_SOURCES) find-config-fragments: $(SCALA_SOURCES)
rm -rf /tmp/scala_files.f @$(foreach file,$(SCALA_SOURCES),echo $(file) >> $(IN_F)${\n})
@$(foreach file,$(SCALA_SOURCES),echo $(file) >> /tmp/scala_files.f${\n}) $(base_dir)/scripts/config-finder.py -l $(CONFIG_FRAG_LEVELS) $(IN_F)
$(base_dir)/scripts/config-finder.py -l $(CONFIG_FRAG_LEVELS) /tmp/scala_files.f @rm -rf $(dir $(IN_F))
.PHONY: help .PHONY: help
help: help:

2
sims/firesim

Submodule sims/firesim updated: 9d3462ed13...69e428f010

5
variables.mk
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@@ -205,7 +205,7 @@ sim_common_files ?= $(build_dir)/sim_files.common.f
######################################################################################### #########################################################################################
JAVA_HEAP_SIZE ?= 8G JAVA_HEAP_SIZE ?= 8G
JAVA_TMP_DIR ?= $(base_dir)/.java_tmp JAVA_TMP_DIR ?= $(base_dir)/.java_tmp
export JAVA_TOOL_OPTIONS ?= -Xmx$(JAVA_HEAP_SIZE) -Xss8M -Djava.io.tmpdir=$(JAVA_TMP_DIR) export JAVA_TOOL_OPTIONS ?= -Xmx$(JAVA_HEAP_SIZE) -Xss8M -Dsbt.supershell=false -Djava.io.tmpdir=$(JAVA_TMP_DIR)
######################################################################################### #########################################################################################
# default sbt launch command # default sbt launch command
@@ -222,7 +222,8 @@ SBT_CLIENT_FLAG = --client
endif endif
# passes $(JAVA_TOOL_OPTIONS) from env to java # passes $(JAVA_TOOL_OPTIONS) from env to java
SBT_BIN ?= java -jar $(ROCKETCHIP_DIR)/sbt-launch.jar export SBT_OPTS ?= -Dsbt.ivy.home=$(base_dir)/.ivy2 -Dsbt.global.base=$(base_dir)/.sbt -Dsbt.boot.directory=$(base_dir)/.sbt/boot/
SBT_BIN ?= java -jar $(ROCKETCHIP_DIR)/sbt-launch.jar $(SBT_OPTS)
SBT = $(SBT_BIN) $(SBT_CLIENT_FLAG) SBT = $(SBT_BIN) $(SBT_CLIENT_FLAG)
SBT_NON_THIN = $(subst $(SBT_CLIENT_FLAG),,$(SBT)) SBT_NON_THIN = $(subst $(SBT_CLIENT_FLAG),,$(SBT))

2
vlsi/Makefile
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@@ -51,8 +51,6 @@ else
OBJ_DIR ?= $(vlsi_dir)/$(VLSI_OBJ_DIR)/$(long_name)-$(VLSI_TOP) OBJ_DIR ?= $(vlsi_dir)/$(VLSI_OBJ_DIR)/$(long_name)-$(VLSI_TOP)
endif endif
ENABLE_VLSI_FLOW ?= 1
######################################################################################### #########################################################################################
# general rules # general rules
######################################################################################### #########################################################################################